FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/
LVTTL FREQUENCY SYNTHESIZER
840002I DATA SHEET
10 REVISION A 3/30/15
LAYOUT GUIDELINE
Figure 3 shows a schematic example of the 840002I. An
example of LVCMOS termination is shown in this schematic.
Additional LVCMOS termination approaches are shown in the
LVCMOS Termination Application Note. In this example, an 18
pF parallel resonant 26.5625MHz crystal is used. The C1=22pF
FIGURE 3. 840002I SCHEMATIC EXAMPLE
and C2=22pF are recommended for frequency accuracy. For
different board layout, the C1 and C2 may be slightly adjusted for
optimizing frequency accuracy. 1KΩ pullup or pulldown resistors
can be used for the logic control input pins.
XTAL1
Optional Termination
RD1
Not Install
RU1
1K
VDD
C4
0.01u
If not using the crystal input, it can be left floating.
For additional protection the XTAL_IN pin can be
tied to ground.
Zo = 50 Ohm
LVCMOS
Set Logic
Input to
'0'
Unused output can be left floating. There should
no trace attached to unused output. Device
characterized with all outputs terminated.
R1
10
R4
100
To Logic
Input
pins
Set Logic
Input to
'1'
Logic Control Input Examples
R2
33
C6
0.1u
VDDA
C2
22pF
To Logic
Input
pins
Zo = 50 Ohm
X1
VDD
RD2
1K
C5
0.1u
C3
10uF
VDD
R3
100
VDD
LVCMOS
XTAL2
U1
ICS840002i
1
2
3
4
5
6
7
8 9
10
11
12
13
14
15
16
FSEL0
XTAL_SEL
TEST_CLK
OE
MR
nPLL_SEL
VDDA
VDD XTAL_OUT
XTAL_ I N
VDDO
Q1
Q0
GND
GND
FSEL1
RU2
Not Install
VDD
C1
22pF
