74LVQ174SCX

© 2001 Fairchild Semiconductor Corporation DS011353 www.fairchildsemi.com
February 1992
Revised June 2001
74LVQ174 Low Voltage Hex D-Type Flip-Flop with Master Reset
74LVQ174
Low Voltage Hex D-Type Flip-Flop with Master Reset
General Description
The LVQ174 is a high-speed hex D-type flip-flop. The
device is used primarily as a 6-bit edge-triggered storage
register. The information on the D inputs is transferred to
storage during the LOW-to-HIGH clock transition. The
device has a Master Reset to simultaneously clear all flip-
flops.
Features
Ideal for low power/low noise 3.3V applications
Guaranteed simultaneous switching noise level and
dynamic threshold performance
Guaranteed pin-to-pin skew AC performance
Guaranteed incident wave switching into 75
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Pin Descriptions
Order Number Package Number Package Description
74LVQ174SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74LVQ174SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Pin Names Description
D
0
D
5
Data Inputs
CP Clock Pulse Input
MR
Master Reset Input
Q
0
Q
5
Outputs
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74LVQ174
Functional Description
The LVQ174 consists of six edge-triggered D-type flip-flops
with individual D inputs and Q outputs. The Clock (CP) and
Master Reset (MR
) are common to all flip-flops. Each D
inputs state is transferred to the corresponding flip-flops
output following the LOW-to-HIGH Clock (CP) transition. A
LOW input to the Master Reset (MR
) will force all outputs
LOW independent of Clock or Data inputs. The LVQ174 is
useful for applications where the true output only is
required and the Clock and Master Reset are common to
all storage elements.
Truth Table
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
= LOW-to-HIGH Transition
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Inputs Output
MR
CP D Q
LXX L
H
HH
H
LL
HLX Q
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74LVQ174
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
(Note 2)
Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The Recommended Operating Conditions table will define the conditions
for actual device operation.
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Note 3: All outputs loaded; thresholds on input associated with output under test.
Note 4: Maximum test duration 2.0 ms, one output loaded at a time.
Note 5: Incident wave switching on transmission lines with impedances as low as 75 for commercial temperature range is guaranteed.
Note 6: Worst case package.
Note 7: Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V; one output at GND.
Note 8: Max number of Data Inputs (n) switching. (n 1) inputs switching 0V to 3.3V. Input-under-test switching: 3.3V to threshold (V
ILD
), 0V to threshold
(V
IHD
), f = 1 MHz.
Supply Voltage (V
CC
) 0.5V to +7.0V
DC Input Diode Current (I
IK
)
V
I
= 0.5V 20 mA
V
I
= V
CC
+ 0.5V +20 mA
DC Input Voltage (V
I
) 0.5V to V
CC
+ 0.5V
DC Output Diode Current (I
OK
)
V
O
= 0.5V 20 mA
V
O
= V
CC
+ 0.5V +20 mA
DC Output Voltage (V
O
) 0.5V to V
CC
+ 0.5V
DC Output Source
or Sink Current (I
O
) ±50 mA
DC V
CC
or Ground Current
(I
CC
or I
GND
) ±200 mA
Storage Temperature (T
STG
) 65°C to +150°C
DC Latch-Up Source or
Sink Current ±100 mA
Supply Voltage (V
CC
) 2.0V to 3.6V
Input Voltage (V
I
)0V to V
CC
Output Voltage (V
O
)0V to V
CC
Operating Temperature (T
A
) 40°C to +85°C
Minimum Input Edge Rate (
V/t)
V
IN
from 0.8V to 2.0V
V
CC
@ 3.0V 125 mV/ns
Symbol Parameter
V
CC
T
A
= +25°CT
A
= 40°C to +85°C
Units Conditions
(V) Typ Guaranteed Limits
V
IH
Minimum High Level
3.0 1.5 2.0 2.0 V
V
OUT
= 0.1V
Input Voltage or V
CC
0.1V
V
IL
Maximum Low Level
3.0 1.5 0.8 0.8 V
V
OUT
= 0.1V
Input Voltage or V
CC
0.1V
V
OH
Minimum High Level 3.0 2.99 2.9 2.9 V I
OUT
= 50 µA
Output Voltage
3.0 2.58 2.48 V
V
IN
= V
IL
or V
IH
(Note 3)
I
OH
= 12 mA
V
OL
Maximum Low Level 3.0 0.002 0.1 0.1 V I
OUT
= 50 µA
Output Voltage
3.0 0.36 0.44 V
V
IN
= V
IL
or V
IH
(Note 3)
I
OL
= 12 mA
I
IN
Maximum Input
3.6 ±0.1 ±1.0 µA
V
I
= V
CC
,
Leakage Current GND
I
OLD
Minimum Dynamic (Note 4) 3.6 36 mA V
OLD
= 0.8V Max (Note 5)
I
OHD
Output Current 3.6 25 mA V
OHD
= 2.0V Min (Note 5)
I
CC
Maximum Quiescent
3.6 4.0 40.0 µA
V
IN
= V
CC
Supply Current or GND
V
OLP
Quiet Output
3.3 0.7 0.8 V (Note 6)(Note 7)
Maximum Dynamic V
OL
V
OLV
Quiet Output
3.3 0.6 0.8 V (Note 6)(Note 7)
Minimum Dynamic V
OL
V
IHD
Maximum High Level
3.3 1.8 2.0 V (Note 6)(Note 8)
Dynamic Input Voltage
V
ILD
Maximum Low Level
3.3 1.6 0.8 V (Note 6)(Note 8)
Dynamic Input Voltage

74LVQ174SCX

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IC FF D-TYPE SNGL 6BIT 16SOIC
Lifecycle:
New from this manufacturer.
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