ISL6520AIBZ-T

4
FN9016.6
December 10, 2009
Absolute Maximum Ratings Thermal Information
Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +6.0V
Absolute Boot Voltage, V
BOOT
. . . . . . . . . . . . . . . . . . . . . . . +15.0V
Upper Driver Supply Voltage, V
BOOT
- V
PHASE
. . . . . . . . 7.0V (DC)
. . . . . . . . . . . . . . . . . . . . . . . . . . 8.0V (<10ns Pulse Width, 10μJ)
Input, Output or I/O Voltage . . . . . . . . . . . GND -0.3V to VCC +0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Operating Conditions
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V ±10%
Ambient Temperature Range - ISL6520AC . . . . . . . . . 0°C to +70°C
Ambient Temperature Range - ISL6520AI. . . . . . . . .-40°C to +85°C
Junction Temperature Range. . . . . . . . . . . . . . . . . .-40°C to +125°C
Thermal Resistance θ
JA
(°C/W) θ
JC
(°C/W)
SOIC Package (Note 1) . . . . . . . . . . . . . . 95 N/A
QFN Package (Notes 2, 3). . . . . . . . . . . . . 45 7
Maximum Junction Temperature (Plastic Package). . . . . . . . +150°C
Maximum Storage Temperature Range. . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. θ
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2. θ
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
3. For θ
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted.
PARAMETER SYMBOL TEST CONDITIONS
MIN
(Note 4) TYP
MAX
(Note 4) UNITS
VCC SUPPLY CURRENT
Nominal Supply I
VCC
2.6 3.2 3.8 mA
POWER-ON RESET
Rising VCC POR Threshold POR 4.19 4.30 4.50 V
VCC POR Threshold Hysteresis -0.25- V
OSCILLATOR
Frequency f
OSC
ISL6520AC, VCC
= 5V 250 300 340 kHz
ISL6520AI, VCC
= 5V 230 300 340 kHz
Ramp Amplitude DV
OSC
-1.5-V
P-P
REFERENCE
Reference Voltage Tolerance ISL6520AC -1.5 - +1.5 %
ISL6520AI -2.5 - +2.5 %
Nominal Reference Voltage V
REF
-0.800- V
ERROR AMPLIFIER
DC Gain Limits established by characterization and
are not production tested
-88- dB
Gain-Bandwidth Product GBWP - 15 - MHz
Slew Rate SR - 8 - V/µs
GATE DRIVERS
Upper Gate Source Current I
UGATE-SRC
V
BOOT
- V
PHASE
= 5V, V
UGATE
= 4V - -1 - A
Upper Gate Sink Current I
UGATE-SNK
-1- A
Lower Gate Source Current I
LGATE-SRC
V
VCC
= 5V, V
LGATE
= 4V - -1 - A
Lower Gate Sink Current I
LGATE-SNK
-2- A
PROTECTION / DISABLE
OCSET Current Source I
OCSET
ISL6520AC 17 20 22 µA
ISL6520AI 14 20 24 µA
Disable Threshold V
DISABLE
-0.8- V
NOTE:
4. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
ISL6520A
5
FN9016.6
December 10, 2009
Functional Pin Description
VCC
This pin provides the bias supply for the ISL6520A, as well
as the lower MOSFET’s gate. Connect a well-decoupled 5V
supply to this pin.
FB
This pin is the inverting input of the internal error amplifier.
Use this pin, in combination with the COMP/OCSET pin, to
compensate the voltage-control feedback loop of the
converter.
GND
This pin represents the signal and power ground for the IC.
Tie this pin to the ground island/plane through the lowest
impedance connection available.
PHASE
Connect this pin to the upper MOSFET’s source. This pin is
used to monitor the voltage drop across the upper MOSFET
for overcurrent protection.
UGATE
Connect this pin to the upper MOSFET’s gate. This pin
provides the PWM-controlled gate drive for the upper
MOSFET. This pin is also monitored by the adaptive
shoot-through protection circuitry to determine when the
upper MOSFET has turned off.
BOOT
This pin provides ground referenced bias voltage to the
upper MOSFET driver. A bootstrap circuit is used to create a
voltage suitable to drive a logic-level N-channel MOSFET.
COMP/OCSET
This is a multiplexed pin. During a short period of time
following power-on reset (POR), this pin is used to determine
the overcurrent threshold of the converter. Connect a
resistor (R
OCSET
) from this pin to the drain of the upper
MOSFET (V
CC
). R
OCSET
, an internal 20µA current source
(I
OCSET
), and the upper MOSFET on-resistance (r
DS(ON)
)
set the converter overcurrent (OC) trip point according to
Equation 1:
Internal circuitry of the ISL6520A will not recognize a voltage
drop across R
OCSET
larger than 0.5V. Any voltage drop
across R
OCSET
that is greater than 0.5V will set the
overcurrent trip point to:
An overcurrent trip cycles the soft-start function.
During soft-start, and all the time during normal converter
operation, this pin represents the output of the error
amplifier. Use this pin, in combination with the
COMP/OCSET pin, to compensate the voltage-control
feedback loop of the converter.
Pulling COMP/OCSET to a level below 0.8V disables the
controller. Disabling the ISL6520A causes the oscillator to
stop, the LGATE and UGATE outputs to be held low, and the
softstart circuitry to re-arm.
LGATE
Connect this pin to the lower MOSFET’s gate. This pin
provides the PWM-controlled gate drive for the lower
MOSFET. This pin is also monitored by the adaptive
shoot-through protection circuitry to determine when the
lower MOSFET has turned off.
Functional Description
Initialization
The ISL6520A automatically initializes upon receipt of power.
The Power-On Reset (POR) function continually monitors the
bias voltage at the VCC pin. The POR function initiates the
Overcurrent Protection (OCP) sampling and hold operation
after the supply voltage exceeds its POR threshold. Upon
completion of the OCP sampling and hold operation, the POR
function initiates the soft-start operation.
Overcurrent Protection
The overcurrent function protects the converter from a shorted
output by using the upper MOSFET’s on-resistance, r
DS(ON)
,
to monitor the current. This method enhances the converter’s
efficiency and reduces cost by eliminating a current sensing
resistor.
The overcurrent function cycles the soft-start function in a
hiccup mode to provide fault protection. A resistor (R
OCSET
)
programs the overcurrent trip level (see “Typical Application”
on page 3).
Immediately following POR, the ISL6520A initiates the
Overcurrent Protection sampling and hold operation. First,
the internal error amplifier is disabled. This allows an internal
20mA current sink to develop a voltage across R
OCSET
. The
ISL6520A then samples this voltage at the COMP pin. This
sampled voltage, which is referenced to the VCC pin, is held
internally as the Overcurrent Set Point.
When the voltage across the upper MOSFET, which is also
referenced to the VCC pin, exceeds the Overcurrent Set
Point, the overcurrent function initiates a soft-start sequence.
Figure 1 shows the inductor current after a fault is introduced
while running at 15A. The continuous fault causes the
ISL6520A to go into a hiccup mode with a typical period of
25ms. The inductor current increases to 18A during the soft-
start interval and causes an overcurrent trip. The converter
dissipates very little power with this method. The measured
input power for the conditions of Figure 1 is only 1.5W.
I
PEAK
I
OCSET
xR
OCSET
r
DS ON()
-------------------------------------------------=
(EQ. 1)
I
PEAK
0.5V
r
DS ON()
----------------------=
(EQ. 2)
ISL6520A
6
FN9016.6
December 10, 2009
The overcurrent function will trip at a peak inductor current
(I
PEAK)
determined by Equation 3:
where I
OCSET
is the internal OCSET current source (20µA
typical). The OC trip point varies mainly due to the
MOSFET’s r
DS(ON)
variations. To avoid overcurrent tripping
in the normal operating load range, find the R
OCSET
resistor
from the equation above with:
1. The maximum r
DS(ON)
at the highest junction
temperature.
2. The minimum I
OCSET
from the specification table.
3. Determine I
PEAK
for
,
where ΔI is the output inductor ripple current.
For an equation for the ripple current see the section under
component guidelines titled “Output Inductor Selection” on
page 8.
Soft-Start
The POR function initiates the soft-start sequence after the
overcurrent set point has been sampled. Soft-start clamps the
error amplifier output (COMP pin) and reference input
(non-inverting terminal of the error amp) to the internally
generated soft-start voltage. Figure 2 shows a typical start-up
interval where the COMP/OCSET pin has been released from
a grounded (system shutdown) state. Initially, the
COMP/OCSET is used to sample the overcurrent setpoint by
disabling the error amplifier and drawing 20µA through
R
OCSET
. Once the overcurrent level has been sampled, the
soft-start function is initiated. The clamp on the error amplifier
(COMP/OCSET pin) initially controls the converter’s output
voltage during soft-start. The oscillator’s triangular waveform is
compared to the ramping error amplifier voltage. This
generates PHASE pulses of increasing width that charge the
output capacitor(s). When the internally generated soft-start
voltage exceeds the feedback (FB pin) voltage, the output
voltage is in regulation. This method provides a rapid and
controlled output voltage rise. The entire startup sequence
typically take about 11ms.
Current Sinking
The ISL6520A incorporates a MOSFET shoot-through
protection method which allows a converter to sink current
as well as source current. Care should be exercised when
designing a converter with the ISL6520A when it is known
that the converter may sink current.
When the converter is sinking current, it is behaving as a
boost converter that is regulating it’s input voltage. This
means that the converter is boosting current into the V
CC
rail, which supplies the bias voltage to the ISL6520A. If there
is nowhere for this current to go, such as to other distributed
loads on the V
CC
rail, through a voltage limiting protection
device, or other methods, the capacitance on the V
CC
bus
will absorb the current. This situation will allow voltage level
of the V
CC
rail to increase. If the voltage level of the rail is
boosted to a level that exceeds the maximum voltage rating
of the ISL6520A, then the IC will experience an irreversible
failure and the converter will no longer be operational.
Ensuring that there is a path for the current to follow other
than the capacitance on the rail will prevent this failure
mode.
Application Guidelines
Layout Considerations
As in any high frequency switching converter, layout is very
important. Switching current from one power device to another
can generate voltage transients across the impedances of the
interconnecting bond wires and circuit traces. These
interconnecting impedances should be minimized by using
wide, short printed circuit traces. The critical components
should be located as close together as possible, using ground
plane construction or single point grounding.
FIGURE 1. OVERCURRENT OPERATION
TIME (5ms/DIV.)
OUTPUT
INDUCTOR
5A/DIV.
CURRENT
I
PEAK
I
OCSET
x R
OCSET
r
DS ON()
-----------------------------------------------------=
(EQ. 3)
I
PEAK
I
OUT MAX()
ΔI()
2
----------
+>
FIGURE 2. SOFT-START INTERVAL
V
OUT
500mV/DIV.
COMP/OCSET
1V/DIV.
TIME (2ms/DIV.)
ISL6520A

ISL6520AIBZ-T

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Switching Controllers C4M SINGLE 5V PWM CNTRLR W/DDRG
Lifecycle:
New from this manufacturer.
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