FDMS9409L-F085 N-Channel Logic Level PowerTrench
®
MOSFET
©2016 Semiconductor Components Industries, LLC.
August-2017,Rev. 2
Publication Order Number:
FDMS9409L-F085/D
FDMS9409L-F085
N-Channel Logic Level PowerTrench
®
MOSFET
40 V, 65 A, 2.8 mΩ
Features
Typical R
DS(on)
= 2.3 mΩ at V
GS
= 10V, I
D
= 65 A
Typical Q
g(tot)
= 47 nC at V
GS
= 10V, I
D
= 65 A
UIS Capability
RoHS Compliant
Qualified to AEC Q101
Applications
Automotive Engine Control
PowerTrain Management
Solenoid and Motor Drivers
Electronic Steering
Integrated Starter/Alternator
Distributed Power Architectures and VRM
Primary Switch for 12V Systems
MOSFET Maximum Ratings T
J
= 25°C unless otherwise noted.
Symbol Parameter Ratings
Units
V
DSS
Drain-to-Source Voltage 40 V
V
GS
Gate-to-Source Voltage ±20 V
I
D
Drain Current - Continuous (V
GS
=10) (Note 1) T
C
= 25°C 65
A
Pulsed Drain Current T
C
= 25°C See Figure 4
E
AS
Single Pulse Avalanche Energy (Note 2) 81 mJ
P
D
Power Dissipation 100 W
Derate Above 25
o
C0.67W/
o
C
T
J
, T
STG
Operating and Storage Temperature -55 to + 175
o
C
R
θJC
Thermal Resistance, Junction to Case 1.5
o
C/W
R
θJA
Maximum Thermal Resistance, Junction to Ambient (Note 3) 50
o
C/W
Package Marking and Ordering Information
Device Marking Device Package Reel Size Tape Width Quantity
FDMS9409L
FDMS9409L-F085
Power56 13” 12mm 3000units
Notes:
1: Current is limited by bondwire configuration.
2: Starting T
J
= 25°C, L = 60μH, I
AS
= 52A, V
DD
= 40V during inductor charging and V
DD
= 0V during time in avalanche.
3: R
θJA
is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder
mounting surface of the drain pins. R
θJC
is guaranteed by design, while R
θJA
is determined by the board design. The maximum rating
presented here is based on mounting on a 1 in
2
pad of 2oz copper.