REVISION A 10/15/15
843031I-01 DATA SHEET
7 FEMTOCLOCK
®
CRYSTAL-TO-
3.3V, 2.5V LVPECL CLOCK GENERATOR
APPLICATION INFORMATION
FIGURE 2. CRYSTAL INPUt INTERFACE
CRYSTAL INPUT INTERFACE
The 843031I-01 has been characterized with 18pF parallel
resonant crystals. The capacitor values, C1 and C2, shown in
Figure 2 below were determined using a 25MHz, 18pF parallel
resonant crystal and were chosen to minimize the ppm error.
The optimum C1 and C2 values can be slightly adjusted for
different board layouts.
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins
are vulnerable to random noise. To achieve optimum jitter per-
formance, power supply isolation is required. The 843031I-01
provides separate power supplies to isolate any high switching
noise from the outputs to the internal PLL. V
CC
and V
CCA
should
be individually connected to the power supply plane through
vias, and 0.01µF bypass capacitors should be used for each
pin. Figure 1 illustrates this for a generic V
CC
pin and also shows
that V
CCA
requires that an additional10Ω resistor along with a
10µF bypass capacitor be connected to the V
CCA
pin.
FIGURE 1. POWER SUPPLY FILTERING
10Ω
V
CCA
10μF
.01μF
3.3V or 2.5V
.01μF
V
CC
