15
Appendix B. Electrical Considerations (Continued...)
Current Calculations
The peak and average display current requirements have a signicant impact on power supply selection. The
maximum peak current is calculated with Equation 3.
The average current required by the display can be calculated with Equation 4.
The power supply has to be able to supply I
PEAK
transients and supply I
LED
(AVG) continuously. The range on V
LED
allows noise on this supply without sig ni cantly changing the display brightness.
V
LOGIC
and V
LED
Considerations
The display uses two indepen dent electrical systems. One system is used to power the display’s logic and the
other to power the display’s LEDs. These two systems keep the logic supply clean.
Separate electrical systems allow the voltage applied to V
LED
and V
LOGIC
to be varied independently. Thus, V
LED
can
vary from 0 to 5.5 V without aecting either the Dot or the Control Registers. V
LED
can be varied between 4.0 to
5.5 V with out any noticeable variation in light output. However, oper at ing V
LED
below 4.0 V may cause objection-
able mismatch between the pixels and is not recommended. Dimming the display by pulse width modulat ing
V
LED
is also not recommended.
V
LOGIC
can vary from 3.0 V to 5.5 V without aecting either the displayed message or the display intensity. How-
ever, operation below 4.5 V will change the timing and logic levels and operation below 3 V may cause the Dot
and Control Registers to be altered.
The logic ground is internally connected to the LED ground by a substrate diode. This diode becomes forward
biased and conducts when the logic ground is 0.4 V greater than the LED ground. The LED ground and the logic
ground should be connected to a common ground which can withstand the current introduced by the switching
LED drivers. When separate ground connections are used, the LED ground can vary from -0.3 V to +0.3 V with
respect to the logic ground. Voltages below -0.3 V can cause all the dots to be ON. Voltage above +0.3 V can
cause dimming and dot mismatch. The LED ground for the LED drivers can be routed separately from the logic
ground until an appropri ate ground plane is available. On long interconnections between the display and the
host system, voltage drops on the analog ground can be kept from aecting the display logic levels by isolating
the two grounds.
Electrostatic Discharge
The inputs to the ICs are pro tected against static discharge and input current latchup. How ever, for best results,
standard CMOS handling precautions should be used. Before use, the HCMS-29xx should be stored in antistatic
tubes or in conductive material. During assembly, a grounded conductive work area should be used and assem-
bly personnel should wear conduc tive wrist straps. Lab coats made of synthetic material should be avoided since
they are prone to static buildup. Input current latchup is caused when the CMOS inputs are subjected to either a
voltage below ground (V
IN
< ground) or to a voltage higher than V
LOGIC
(V
IN
> V
LOGIC
) and when a high current is
forced into the input. To prevent input current latchup and ESD damage, unused inputs should be con nected to
either ground or V
LOGIC
. Voltages should not be applied to the inputs until V
LOGIC
has been applied to the display.
Appendix C. Oscillator
The oscillator provides the internal refresh circuitry with a signal that is used to synchron ize the columns and
rows. This ensures that the right data is in the dot drivers for that row. This signal can be supplied from either an
external source or the internal source.
A display refresh rate of 100 Hz or faster ensures icker-free operation. Thus for an external oscillator the frequency
should be greater than or equal to 512 x 100 Hz = 51.2 kHz. Operation above 1 MHz without the prescaler or 8
MHz with the prescaler may cause noticeable pixel to pixel mismatch.
