www.irf.com 1
6/30/05
IRF6644
DirectFET Power MOSFET
DirectFET ISOMETRIC
MN
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
Fig 1. Typical On-Resistance Vs. Gate Voltage
Typical values (unless otherwise specified)
Fig 2. Typical On-Resistance Vs. Drain Current
Description
The IRF6644 combines the latest HEXFET® Power MOSFET Silicon technology with the advanced DirectFET
TM
packaging to achieve the
lowest on-state resistance in a package that has the footprint of an SO-8 and only 0.7 mm profile. The DirectFET package is compatible with
existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques,
when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided
cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6644 is optimized for primary side bridge topologies in isolated DC-DC applications, for wide range universal input Telecom applications
(36V - 75V), and for secondary side synchronous rectification in regulated DC-DC topologies. The reduced total losses in the device coupled
with the high level of thermal performance enables high efficiency and low temperatures, which are key for system reliability improvements,
and makes this device ideal for high performance isolated DC-DC converters.
l RoHs Compliant Containing No Lead and Bromide
l Low Profile (<0.7 mm)
l Dual Sided Cooling Compatible
l Ultra Low Package Inductance
l Optimized for High Frequency Switching
l Ideal for High Performance Isolated Converter
Primary Switch Socket
l Optimized for Synchronous Rectification
l Low Conduction Losses
l Compatible with existing Surface Mount Techniques
Absolute Maximum Ratin
s
Parameter Units
V
DS
Drain-to-Source Voltage V
V
GS
Gate-to-Source Voltage
I
D
@ T
A
= 25°C
Continuous Drain Current, V
GS
@ 10V
I
D
@ T
A
= 70°C
Continuous Drain Current, V
GS
@ 10V
A
I
D
@ T
C
= 25°C
Continuous Drain Current, V
GS
@ 10V
I
DM
Pulsed Drain Current
E
AS
Single Pulse Avalanche Energy mJ
I
AR
Avalanche Current A
220
Max.
8.3
60
82
±20
100
10.3
6.2
Click on this section to link to the appropriate technical paper.
Click on this section to link to the DirectFET Website.
Surface mounted on 1 in. square Cu board, steady state.
T
C
measured with thermocouple mounted to top (Drain) of part.
Repetitive rating; pulse width limited by max. junction temperature.
Starting T
J
= 25°C, L = 12mH, R
G
= 25Ω, I
AS
= 6.2A.
Notes:
4 6 8 10 12 14 16
V
GS
, Gate-to-Source Voltage (V)
0.00
0.02
0.04
0.06
0.08
T
y
p
i
c
a
l
R
D
S
(
o
n
)
,
(
Ω
)
T
J
= 25°C
T
J
= 125°C
I
D
= 6.2A
0 4 8 12 16 20
I
D
, Drain Current (A)
9
10
11
12
13
T
y
p
i
c
a
l
R
D
S
(
o
n
)
(
m
Ω
)
T
A
= 25°C
V
GS
= 8.0V
V
GS
= 7.0V
V
GS
= 10V
V
GS
= 15V
SH SJ SP MZ MN
V
DSS
V
GS
R
DS(on)
100V max ±20V max
10.3mΩ@ 10V
Q
g tot
Q
gd
V
gs(th)
35nC 11.5nC 3.7V
PD - 96908E
