ICS503MLF

ICS503
LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER
IDT™ / ICS™
LOCO™ PLL CLOCK MULTIPLIER 4
ICS503 REV D 051310
External Components
Decoupling Capacitor
As with any high-performance mixed-signal IC, the
ICS503 must be isolated from system power supply
noise to perform optimally.
A decoupling capacitor of 0.01µF must be connected
between VDD and GND. It must be connected close to
the ICS503 to minimize lead inductance. No external
power supply filtering is required for the ICS503.
Series Termination Resistor
A 33 terminating resistor can be used next to the CLK
pin. The total on-chip capacitance is approximately 12
pF. A parallel resonant, fundamental mode crystal
should be used.
Crystal Load Capacitors
The device crystal connections should include pads for
small capacitors from X1 to ground and from X2 to
ground. These capacitors are used to adjust the stray
capacitance of the board to match the nominally
required crystal load capacitance. Because load
capacitance can only be increased in this trimming
process, it is important to keep stray capacitance to a
minimum by using very short PCB traces (and no vias)
between the crystal and device. Crystal capacitors, if
needed, must be connected from each of the pins X1
and X2 to ground.
The value (in pF) of these crystal caps should equal (C
L
-12 pF)*2. In this equation, C
L
= crystal load capacitance
in pF. Example: For a crystal with a 16 pF load
capacitance, each crystal capacitor would be 8 pF
[(16-12) x 2] = 8.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS503. These ratings, which
are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the
device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Recommended Operation Conditions
Item Rating
Supply Voltage, VDD 7 V
All Inputs and Outputs -0.5 V to VDD+0.5 V
Ambient Operating Temperature 0 to +70° C
Storage Temperature -65 to +150° C
Soldering Temperature 260° C
Parameter Min. Typ. Max. Units
Ambient Operating Temperature 0 +70 ° C
Power Supply Voltage (measured in respect to GND) +3 +5.5 V
ICS503
LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER
IDT™ / ICS™
LOCO™ PLL CLOCK MULTIPLIER 5
ICS503 REV D 051310
DC Electrical Characteristics
VDD=5.0 V ±5% , Ambient temperature 0 to +70° C, unless stated otherwise
AC Electrical Characteristics
VDD = 5.0V ±5%, Ambient Temperature 0 to +70° C, unless stated otherwise
Parameter Symbol Conditions Min. Typ. Max. Units
Operating Voltage VDD 3 5.5 V
Input High Voltage, ICLK only V
IH
ICLK (pin 1) (VDD/2)+1 VDD/2 V
Input Low Voltage, ICLK only V
IL
ICLK (pin 1) VDD/2 (VDD/2)-1 V
Input High Voltage V
IH
S0, S1 VDD-0.5 V
Input Mid Voltage V
IM
S1, S0 VDD/2 V
Input Low Voltage V
IL
S0, S1 0.5 V
Output High Voltage, CMOS high V
OH
I
OH
= -4 mA VDD-0.4 V
Output High Voltage, CMOS high V
OH
I
OH
= -25 mA 2.4 V
Output Low Voltage V
OL
I
OL
= 25 mA 0.4 V
IDD Operating Supply Current, 14
MHz crystal
No load, 80 MHz 16 mA
Short Circuit Current CLK output +
70 mA
Input Capacitance, S1, S0 Pins 6, 7 4 pF
Parameter Symbol Conditions Min. Typ. Max. Units
Input Frequency, crystal input F
IN
527MHz
Input Frequency, clock input F
IN
250MHz
Output Frequency, VDD = 4.5 to 5.5V F
OUT
14 160 MHz
Output Frequency, VDD = 3.0 to 3.6V 14 100 MHz
Output Clock Rise Time t
OR
0.8 to 2.0 V 1 ns
Output Clock Fall Time t
OF
2.0 to 8.0V 1 ns
Output Clock Duty Cycle t
OD
at VDD/2 45 49-51 55 %
Absolute Clock Period Jitter t
ja
Deviation from
mean
+100 ps
One Sigma Clock Period Jitter t
js
30 ps
ICS503
LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER
IDT™ / ICS™
LOCO™ PLL CLOCK MULTIPLIER 6
ICS503 REV D 051310
Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Narrow Body)
Package dimensions are kept current with JEDEC Publication No. 95
Ordering Information
“LF” denotes Pb-free packaging, RoHS compliant.
While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT)
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result
from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any
circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or
critical medical instruments.
Part / Order Number Marking Shipping packaging Package Temperature
503MLF 503MLF Tubes 8 pin SOIC 0 to +70° C
503MLFT 503MLF Tape and Reel 8 pin SOIC 0 to +70° C
D
EH
c
h x 45
0
be
Q
A
Pin 1
Index
Area
Millimeters Inches
Symbol Min Max Min Max
A 1.35 1.75 0.0532 0.0688
A1 1.10 0.25 0.0040 0.0098
B 0.33 0.51 0.013 0.020
C 0.19 0.25 0.0075 0.0098
D 4.80 5.00 .1890 .1968
E 3.80 4.00 0.1497 0.1574
e 1.27 Basic 0.050 Basic
H 5.80 6.20 0.2284 0.2440
h 0.25 0.50 0.010 0.020
L 0.40 1.27 0.016 0.050
a0° 8° 0° 8°

ICS503MLF

Mfr. #:
Manufacturer:
Description:
IC PLL CLK MULTIPLIER 8-SOIC
Lifecycle:
New from this manufacturer.
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