MC100H640FN

© Semiconductor Components Industries, LLC, 2006
August, 2016 Rev. 9
1 Publication Order Number:
MC10H640/D
MC10H640
68030/040 PECL to TTL
Clock Driver
Description
The MC10H640 generates the necessary clocks for the 68030,
68040 and similar microprocessors. It is guaranteed to meet the clock
specifications required by the 68030 and 68040 in terms of part-to-part
skew, within-part skew and also duty cycle skew.
The user has a choice of using either TTL or PECL (ECL referenced
to +5.0 V) for the input clock. TTL clocks are typically used in present
MPU systems. However, as clock speeds increase to 50 MHz and
beyond, the inherent superiority of ECL (particularly differential
ECL) as a means of clock signal distribution becomes increasingly
evident. The H640 also uses differential PECL internally to achieve its
superior skew characteristic.
The H640 includes divide-by-two and divide-by-four stages, both to
achieve the necessary duty cycle skew and to generate MPU clocks as
required. A typical 50 MHz processor application would use an input
clock running at 100 MHz, thus obtaining output clocks at 50 MHz
and 25 MHz (see Logic Diagram).
Features
Generates Clocks for 68030/040
Meets 030/040 Skew Requirements
TTL or PECL Input Clock
Extra TTL and PECL Power/Ground Pins
Asynchronous Reset
Single +5.0 V Supply
This Device is Pb-Free, Halogen Free and is RoHS Compliant
Function
Reset (R): LOW on RESET forces all Q outputs LOW and all Q
outputs HIGH.
Power-Up: The device is designed to have the POS edges of the ÷ 2
and ÷ 4 outputs synchronized at power up.
Select (SEL): LOW selects the ECL input source (DE/DE
). HIGH
selects the TTL input source (DT).
The H640 also contains circuitry to force a stable state of the ECL
input differential pair, should both sides be left open. In this case, the
DE side of the input is pulled LOW, and DE
goes HIGH.
MARKING DIAGRAM*
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb-Free Package
PLLC28
FN SUFFIX
CASE 77602
MC10H640G
AWLYYWW
1
www.onsemi.com
*For additional marking information, refer to
Application Note AND8002/D
.
ORDERING INFORMATION
Device Package Shipping
MC10H640FNG PLLC28
(Pb-Free)
37 Units / Tube
MC10H640
www.onsemi.com
2
1
VT VT Q1 GT GT Q0 VT
GT GT Q4 Q5 VT SEL
56 7891011
25 24 23 22 21 20 19
Q1
Figure 1. Pinout: PLCC28
(Top View)
V
BB
DE
DE
VE
R
GE
DTQ0
VT
VT
Q3
GT
GT
Q2
4
3
2
28
27
26
18
17
16
15
14
13
12
Figure 2. Logic Diagram
TTL Outputs
TTL/ECL Clock Inputs
TTL Control Inputs
V
BB
DE
DT
SEL
R
DE
MUX
÷ 2
÷ 4
Q0
Q1
Q2
Q3
Q0
Q1
Q4
Q5
Table 1. PIN DESCRIPTION
PIN FUNCTION
GT
VT
VE
GE
DE, DE
V
BB
DT
Qn, Qn
SEL
R
TTL Ground (0 V)
TTL V
CC
(+5.0 V)
ECL V
CC
(+5.0 V)
ECL Ground (0 V)
ECL Signal Input (positive ECL)
V
BB
Reference Output
TTL Signal Input
Signal Outputs (TTL)
Input Select (TTL)
Reset (TTL)
Table 2. DC CHARACTERISTICS (V
T
= V
E
= 5.0 V ±5%)
Symbol
Characteristic Condition
0°C 25°C 85°C
Min Max Min Max Min Max Unit
I
EE
Power Supply Current
ECL VE Pin 57 57 57 mA
I
CCH
TTL Total all VT pins
30 30 30 mA
I
CCL
30 30 30 mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
MC10H640
www.onsemi.com
3
Table 3. 10H PECL DC CHARACTERISTICS (V
T
= V
E
= 5.0 V ±5%)
Symbol
Characteristic Condition
0°C 25°C 85°C
Unit
Min Max Min Max Min Max
I
INH
I
INL
Input HIGH Current
Input LOW Current
0.5
255
0.5
175
0.5
175
mA
V
IH
1
V
IL
1
Input HIGH Voltage
Input LOW Voltage
V
E
= 5.0 V 3.83
3.05
4.16
3.52
3.87
3.05
4.19
3.52
3.94
3.05
4.28
3.555
V
V
BB
1 Output Reference Voltage 3.62 3.73 3.65 3.75 3.69 3.81 V
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. PECL levels are referenced to V
CC
and will vary 1:1 with the power supply. The values shown are for V
CC
= 5.0V.
1. PECL levels are referenced to V
CC
and will vary 1:1 with the power supply. The values shown are for V
CC
= 5.0V.
Table 4. TTL DC CHARACTERISTICS (V
T
= V
E
= 5.0 V ±5%)
Symbol
Characteristic Condition
0°C 25°C 85°C
Unit
Min Max Min Max Min Max
V
IH
V
IL
Input HIGH Voltage
Input LOW Voltage
2.0
0.8
2.0
0.8
2.0
0.8
V
I
IH
Input HIGH Current V
IN
= 2.7 V
V
IN
= 7.0 V
20
100
20
100
20
100
mA
I
IL
Input LOW Current V
IN
= 0.5 V 0.6 0.6 0.6 mA
V
OH
Output HIGH Voltage I
OH
= 3.0 mA
I
OH
= 15 mA
2.5
2.0
2.5
2.0
2.5
2.0
V
V
OL
Output LOW Voltage I
OL
= 24 mA 0.5 0.5 0.5 V
V
IK
Input Clamp Voltage I
IN
= 18 mA 1.2 1.2 1.2 V
I
OS
Output Short Circuit Current V
OUT
= 0 V 100 225 100 225 100 225 mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.

MC100H640FN

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Clock Drivers & Distribution ECL/TTL Clock Driver
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union