6N135,6N136
2014-09-22
4
Switching Specifications
(unless otherwise specified. Ta = 25°C, V
CC
= 5V, I
F
= 16mA)
Characteristic Symbol
Test
Circuit
Test Condition Min Typ. Max Unit
Propagation delay time
to logic low at output
6N135
t
pHL
1
R
L
= 4.1kΩ ― 0.2 1.5 μs
6N136 R
L
= 1.9kΩ ― 0.2 0.8 μs
Propagation delay time
to logic high at output
6N135
t
pLH
1
R
L
= 4.1kΩ ― 1.0 1.5 μs
6N136 R
L
= 1.9kΩ ― 0.5 0.8 μs
Common mode
transient immunity
at logic high level
output (Note 10)
6N135
CM
H
2
I
F
= 0mA
V
CM
= 10V
p−p
R
L
= 4.1kΩ
― 1000 ― V / μs
6N136
I
F
= 0mA
V
CM
= 10V
p−p
R
L
= 1.9kΩ
― 1000 ― V / μs
Common mode
transient immunity
at logic low level
output (Note 10)
6N135
CM
L
2
V
CM
= 10V
p−p
R
L
= 4.1kΩ
I
F
= 16mA
― −1000 ― V / μs
6N136
V
CM
= 10V
p−p
R
L
= 1.9kΩ
I
F
= 16mA
― −1000 ― V / μs
Bandwidth (Note 11) BW ― R
L
= 100Ω ― 2 ― MHz
(Note 8) DC current transfer ratio is defined as the ratio of output collector current, I
O
, to the forward LED input current,
I
F
, times 100%.
(Note 9) Device considered a two−terminal device: Pins 1, 2, 3 and 4 shorted together and pins 5, 6, 7 and 8 shorted
together.
(Note 10) Common mode transient immunity in logic high level is the maximum tolerable (positive) dV
CM
/ dt on the
leading edge of the common mode pulse, V
CM
, to assure that the output will remain in a logic high state (i.e.,
V
O
> 2.0V).
Common mode transient immunity in logic low level is the maximum tolerable (negative) dV
CM
/ dt on the
trailing edge of the common mode pulse signal, V
CM
, to assure that the output will remain in a logic low state
(i.e., V
O
< 0.8V).
(Note 11) The frequency at which the AC output voltage is 3dB below the low frequency asymptote.