MIC2568-0BSM

MIC2568 Micrel
MIC2568 4 May 2003
Symbol Parameter Conditions Min Typ Max Units
V
CC
Switching Time (See Figure 2)
t
9
Output Turn-On Delay Time, V
CC OUT
= 0V to 10% of 3.3V 300 1500 µs
t
10
Note 9
V
CC OUT
= 0V to 10% of 5.0V 750 3000 µs
t
11
Output Rise Time, Note 9 V
CC OUT
= 10% to 90% of 3.3V 200 700 2500 µs
t
12
V
CC OUT
= 10% to 90% of 5V 200 1500 6000 µs
t
13
Output Fall Time, Note 9 V
CC OUT
= 90% to 10% of 3.3V 100 300 1000 µs
t
14
V
CC OUT
= 90% to 10% of 5.0V 100 600 2000 µs
t
15
Output Turnoff Delay, Notes 8, 9 V
CC OUT
= 3.3V 0.65 2 ms
t
16
V
CC OUT
= 5V 0.7 2 ms
Power Supply
I
CC5
V
CC5
IN Supply Current (5V) V
CC OUT
= 5V or 3.3V, I
CC OUT
= 0 8 50 µA
Note 5
V
CC OUT
= 0V (sleep mode) 0.2 10 µA
I
CC3
V
CC3
IN Supply Current (3.3V) V
CC OUT
= 5V or 3.3V, I
CC OUT
= 0 40 100 µA
Note 6
V
CC OUT
= 0V (sleep mode) 0.1 10 µA
Thermal Shutdown
T
SD
Thermal Shutdown Temperature 140 °C
Note 1. Exceeding the absolute maximum rating may damage the device.
Note 2. The device is not guaranteed to function outside its operating rating.
Note 3. Devices are ESD sensitive. Handling precautions recommended.
Note 4. Specification for packaged product only.
Note 5.V
CC5 IN
is not required for operation.
Note 6. V
CC3 IN
powers all internal logic, bias, and drive circuitry, and is required for operation.
Note 7. R
L
= 1k connected to ground.
Note 8. Measurement is from the Hi-Z- or 0V-state command to the beginning of the slope. Measurement does not apply when device is in current
limit or thermal shutdown.
Note 9. R
L
= 10 connected to ground.
May 2003 5 MIC2568
MIC2568 Micrel
Output Timing Diagrams
5V
3.3V
0
0
ABC D
V
PP
OFF
V
PP
OFF
V
PP
to 5VV
PP
to 3.3V
V
PP
Enable
V
PP
OUT
t
2
t
6
t
4
t
8
t
3
t
1
t
5
t
7
Figure 1. V
PP
Timing Diagram
V
PP EN
is shown generically. R
L
= 100. Load capacitance is negligible. Refer to MIC2568-0 Logic Table for specific control
logic input.
At time A)V
PP
= 3.3V, B)V
PP
is disabled, C)V
PP
is programmed to 5V, D)V
PP
is disabled.
ABC D
t
9
t
11
t
15
t
13
t
10
t
12
t
16
t
14
V
CC
Enable
V
CC
OUT
FLAG
V
CC
to 3.3V V
CC
to 5VV
CC
OFF V
CC
OFF
0
5V
3.3V
0
0
Figure 2. V
CC
Timing Diagram
V
CC EN
is shown generically. R
L
= 10. Refer to MIC2568-0 Logic Table for specific control logic input.
At time A)V
CC
is programmed to 3.3V, B)V
CC
is disabled, C)V
CC
is programmed to 5V, D)V
CC
is disabled.
MIC2568 Micrel
MIC2568 6 May 2003
MIC2568-0 Logic Table
V
CC5
EN V
CC3
EN EN1 EN0 V
CC
OUT V
PP
OUT
00000V*Hi-Z
00010V*Hi-Z
00100V*Hi-Z
00110V*0V*
01003.3V Hi-Z
01013.3V 3.3V
01103.3V Hi-Z
01113.3V 0V*
10005VHi-Z
10015V5V
10105VHi-Z
10115V0V*
11003.3V Hi-Z
11013.3V 3.3V
11103.3V 5V
11113.3V 0V*
MIC2568-1 Logic Table
MIC2568-1 control logic is compatible with the Cirrus Logic CL-PD6710 and CL-PD672x-series logic controllers.
V
CC5
EN V
CC3
EN V
PP
_PGM V
PP
_V
CC
V
CC
OUT V
PP
OUT
00000V*0V*
00010V*Hi-Z
00100V*Hi-Z
00110V*Hi-Z
01005V0V*
01015V5V
01105VHi-Z
01115VHi-Z
10003.3V 0V*
10013.3V 3.3V
10103.3V Hi-Z
10113.3V Hi-Z
11000V*0V*
11010V*Hi-Z
11100V*Hi-Z
11110V*Hi-Z
* clamped to ground

MIC2568-0BSM

Mfr. #:
Manufacturer:
Description:
Power Switch ICs - Power Distribution Dual Slot PCMCIA/CardBus Socket Power Controller - For Low Voltages
Lifecycle:
New from this manufacturer.
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