HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR
S-T111 Series
Rev.3.0_00
Seiko Instruments Inc.
12
3. Shutdown pin (ON/OFF pin)
This pin starts and stops the regulator.
When the ON/OFF pin is set to the shutdown level, the operation of all internal circuits stops, and the built-
in P-channel MOS FET output transistor between the VIN pin and VOUT pin is turned off to substantially
reduce the current consumption. The VOUT pin becomes the V
SS
level due to the internally divided
resistance of several MΩ between the VOUT pin and VSS pin.
The structure of the ON/OFF pin is as shown in Figure 12. Since the ON/OFF pin is neither pulled down
nor pulled up internally, do not use it in the floating state. In addition, note that the current consumption
increases if a voltage of 0.3 V to V
IN
– 0.3 V is applied to the ON/OFF pin. When the ON/OFF pin is not
used, connect it to the VSS pin if the logic type is “A” and to the VIN pin if it is “B”.
Table 5
Logic Type ON/OFF Pin Internal Circuits VOUT Pin Voltage Current Consumption
A “L”: Power on Operating Set value I
SS1
A “H”: Power off Stopped V
SS
level I
SS2
B “L”: Power off Stopped V
SS
level I
SS2
B “H”: Power on Operating Set value I
SS1
VSS
ON/OFF
VIN
Figure 12
