AD8051/AD8052/AD8054
Rev. J | Page 16 of 24
THEORY OF OPERATION
CIRCUIT DESCRIPTION
The AD8051/AD8052/AD8054 are fabricated on the Analog
Devices, Inc. proprietary eXtra-Fast Complementary Bipolar
(XFCB) process, which enables the construction of PNP and
NPN transistors with similar fTs in the 2 GHz to 4 GHz region.
The process is dielectrically isolated to eliminate the parasitic
and latch-up problems caused by junction isolation. These
features allow the construction of high frequency, low distortion
amplifiers with low supply currents. This design uses a differential
output input stage to maximize bandwidth and headroom (see
Figure 40). The smaller signal swings required on the first stage
outputs (nodes SIP, SIN) reduce the effect of nonlinear currents
due to junction capacitances and improve the distortion per-
formance. This design achieves harmonic distortion of −80 dBc
@ 1 MHz into 100  with V
OUT
= 2 V p-p (gain = +1) on a
single 5 V supply.
The inputs of the device can handle voltages from −0.2 V below
the negative rail to within 1 V of the positive rail. Exceeding
these values do not cause phase reversal; however, the input
ESD devices begin to conduct if the input voltages exceed the
rails by greater than 0.5 V. During this overdrive condition, the
output stays at the rail.
The rail-to-rail output range of the AD8051/AD8052/AD8054
is provided by a complementary common emitter output stage.
High output drive capability is provided by injecting all output
stage predriver currents directly into the bases of the output
devices Q8 and Q36. Biasing of Q8 and Q36 is accomplished by
I8 and I5, along with a common-mode feedback loop (not
shown). This circuit topology allows the AD8051/AD8052 to
drive 45 mA of output current and allows the AD8054 to drive
30 mA of output current with the outputs within 0.5 V of the
supply rails.
I10
R39
V
EE
I2 I3
Q25
Q51
R23
R27
I9
Q36
I5
V
EE
C3
C9
I8
V
CC
I11
I7
R3
R21
R5
Q3
SIP
SIN
C7
Q4
R15
R2
R26
Q50
Q22
Q21 Q27
Q7
Q8
Q23
Q31
Q39
Q13
Q1
Q24 Q47
Q11
Q2
Q5
Q40
V
OUT
V
CC
V
IN
P
V
IN
N
V
EE
01062-045
Figure 40. AD8051/AD8052 Simplified Schematic
AD8051/AD8052/AD8054
Rev. J | Page 17 of 24
APPLICATION INFORMATION
OVERDRIVE RECOVERY
Overdrive of an amplifier occurs when the output and/or input
range is exceeded. The amplifier must recover from this over-
drive condition. As shown in Figure 41, the AD8051/AD8052/
AD8054 recover within 60 ns from negative overdrive and
within 45 ns from positive overdrive.
VOLTS
V
S
= ±5V
G = +5
R
F
= 2k
R
L
= 2k
V/DIV AS SHOWN
100ns
INPUT 1V/DIV
OUTPUT 2V/DIV
01062-040
Figure 41. Overdrive Recovery
DRIVING CAPACITIVE LOADS
Consider the AD8051/AD8052 in a closed-loop gain of +1 with
+V
S
= 5 V and a load of 2 k in parallel with 50 pF. Figure 42
and Figure 43 show their frequency and time domain responses,
respectively, to a small-signal excitation. The capacitive load
drive of the AD8051/AD8052/AD8054 can be increased by
adding a low value resistor in series with the load. Figure 44
and Figure 45 show the effect of a series resistor on the capaci-
tive drive for varying voltage gains. As the closed-loop gain is
increased, the larger phase margin allows for larger capacitive
loads with less peaking. Adding a series resistor with lower
closed-loop gains accomplishes the same effect. For large
capacitive loads, the frequency response of the amplifier is
dominated by the roll-off of the series resistor and the load
capacitance.
FREQUENCY (MHz)
8
6
4
2
0
–2
–4
–6
–8
–10
GAIN (dB)
–12
0.1 500100110
01062-041
V
S
= 5V
G = +1
R
L
= 2k
C
L
= 50pF
V
OUT
= 200mV p-p
Figure 42. AD8051/AD8052 Closed-Loop Frequency Response; C
L
= 50 pF
2.60
2.55
2.50
2.45
2.40
VOLTS
V
S
= 5V
G = +1
R
L
= 2k
C
L
= 50pF
50mV
100ns
0
1062-042
Figure 43. AD8051/AD8052 200 mV Step Response; C
L
= 50 pF
10000
1000
1
CAPACITIVE LOAD (pF)
100
10
A
CL
(V/V)
V
S
= 5V
30%
OVERSHOOT
R
S
= 3
R
S
= 0
123456
V
OUT
C
L
R
S
R
F
R
G
50
V
IN
100mV
STEP
01062-043
Figure 44. AD8051/AD8052 Capacitive Load Drive vs. Closed-Loop Gain
1000
100
10
CAPACITIVE LOAD (pF)
A
CL
(V/V)
123456
V
OUT
C
L
R
S
R
F
R
G
50
V
IN
100mV
STEP
V
S
= 5V
30%
OVERSHOOT
R
S
= 0
R
S
= 10
01062-044
Figure 45. AD8054 Capacitive Load Drive vs. Closed-Loop Gain
AD8051/AD8052/AD8054
Rev. J | Page 18 of 24
LAYOUT CONSIDERATIONS
The specified high speed performance of the AD8051/AD8052/
AD8054 requires careful attention to board layout and component
selection. Proper RF design techniques and low parasitic
component selection are necessary.
The PCB should have a ground plane covering all unused
portions of the component side of the board to provide a low
impedance path. The ground plane should be removed from the
area near the input pins to reduce parasitic capacitance.
Chip capacitors should be used for supply bypassing. One end
should be connected to the ground plane and the other within
3 mm of each power pin. An additional large (4.7 µF to 10 µF)
tantalum electrolytic capacitor should be connected in parallel,
but not necessarily so close, to supply current for fast, large
signal changes at the output.
The feedback resistor should be located close to the inverting
input pin to keep the parasitic capacitance at this node to a
minimum. Parasitic capacitance of less than 1 pF at the inverting
input can significantly affect high speed performance.
Stripline design techniques should be used for long signal traces
(greater than about 25 mm). These should be designed with a
characteristic impedance of 50  or 75  and be properly
terminated at each end.
ACTIVE FILTERS
Active filters at higher frequencies require wider bandwidth op
amps to work effectively. Excessive phase shift produced by
lower frequency op amps can significantly affect active filter
performance.
Figure 46 shows an example of a 2 MHz biquad bandwidth filter
that uses three op amps of an AD8054. Such circuits are
sometimes used in medical ultrasound systems to lower the
noise bandwidth of the analog signal before analog-to-digital
conversion.
Note that the unused amplifier’s inputs should be tied to ground.
12
13
14
2
1
6
5
7
9
10
8
AD8054
AD8054
3
AD8054
R6
1k
R4
2k
R3
2k
R5
2k
R2
2k
R1
3k
C1
50pF
C2
50pF
V
IN
BAND-PASS
FILTER OUTPUT
01062-046
Figure 46. 2 MHz Biquad Band-Pass Filter Using AD8054
The frequency response of the circuit is shown in Figure 47.
FREQUENCY (Hz)
0
–10
–20
–30
–40
GAIN (dB)
10k 100k 1M 10M 100M
01062-047
Figure 47. Frequency Response of 2 MHz Band-Pass Biquad Filter

AD8051ARZ-REEL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
High Speed Operational Amplifiers SGL RR
Lifecycle:
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