ADG3304-EP
Rev. 0 | Page 7 of 8
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
08845-002
1
2
3
4
5
6
7
NC = NO CONNECT
A1
A2
A3
GND
NC
A4
CCA
14
13
12
11
10
9
8
Y1
Y2
Y3
EN
NC
Y4
V
CCY
TOP VIEW
(Not to Scale)
ADG3304-EP
Figure 2. 14-Lead TSSOP
Pin Configuration
Table 3. 14-Lead TSSOP Pin Function Descriptions
Pin No. Mnemonic Description
1 V
CCA
Power Supply Voltage Input for the A1 to A4 I/O Pins (1.15 V ≤ V
CCA
≤ V
CCY
).
2 A1
Input/Output A1. Referenced to V
CCA
.
3 A2 Input/Output A2. Referenced to V
CCA
.
4 A3 Input/Output A3. Referenced to V
CCA
.
5 A4 Input/Output A4. Referenced to V
CCA
.
6, 9 NC No Connect.
7 GND Ground.
8 EN Active High Enable Input.
10 Y4 Input/Output Y4. Referenced to V
CCY
.
11 Y3 Input/Output Y3. Referenced to V
CCY
.
12 Y2 Input/Output Y2. Referenced to V
CCY
.
13 Y1
Input/Output Y1. Referenced to V
CCY
.
14 V
CCY
Power Supply Voltage Input for the Y1 to Y4 I/O Pins (1.65 V ≤ V
CC
≤ 5.5 V).
Table 4. Truth Table
EN
Y I/O Pins A I/O Pins
0 Hi-Z
1
Hi-Z
1
1 Normal operation
2
Normal operation
2
1
High impedance state.
2
In normal operation, the ADG3304-EP performs level translation.
