NLAST4501DFT2G

© Semiconductor Components Industries, LLC, 2006
May, 2006 − Rev. 4
1 Publication Order Number:
NLAST4501/D
NLAST4501
Single SPST Analog Switch
The NLAST4501 is an analog switch manufactured in sub−micron
silicon−gate CMOS technology. It achieves very low R
ON
while
maintaining extremely low power dissipation. The device is a bilateral
switch suitable for switching either analog or digital signals, which
may vary from zero to full supply voltage.
The NLAST4501 is a low voltage, TTL (low threshold) compatible
device, pin for pin compatible with the MAX4501.
The Enable pin is compatible with standard TTL level outputs when
supply voltage is nominal 5.0 V. It is also over−voltage tolerant,
making it a very useful logic level translator.
Features
Guaranteed R
ON
of 32 at 5.5 V
Low Power Dissipation: I
CC
= 2 A
Low Threshold Enable pin TTL compatible at 5.0 V
TTL version and pin for pin with NLAS4501
Provides Voltage translation for many different voltage levels
3.3 to 5.0 V, Enable pin may go as high as 5.5 V
1.8 to 3.3 V
1.8 to 2.5 V
Improved version of MAX4501 (at any voltage between 2 and 5.5 V)
Chip Complexity: FETs = 11
Pb−Free Packages are Available
V
CC
COM
NO
ENABLEGND
Figure 1. Pinout (Top View)
1
2
3
5
4
3
V
CC
FUNCTION TABLE
See detailed ordering and shipping information on page 8 o
f
this data sheet.
ORDERING INFORMATION
L
H
On/Off Enable Input State of Analog Switch
Off
On
A3 M G
G
MARKING
DIAGRAMS
PIN ASSIGNMENT
Pin
1
Function
COM
2NO
5
GND
4 ENABLE
SC70−5/SC−88A/SOT−353
DF SUFFIX
CASE 419A
TSOP−5
DT SUFFIX
CASE 483
1
1
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A3 = Specific Device Code
M = Date Code*
A = Assembly Location
Y = Year
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
1
A3AYW G
G
1
*Date Code orientation and/or position and underbar
may vary depending upon manufacturing location.
NLAST4501
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2
MAXIMUM RATINGS
Rating Symbol Value Unit
Positive DC Supply Voltage V
CC
0.5 to 7.0 V
Digital Input Voltage (Enable) V
IN
0.5 to 7.0 V
Analog Output Voltage (V
NO
or V
COM
) V
IS
0.5 to V
CC
0.5 V
DC Current, Into or Out of Any Pin I
IK
20 mA
Storage Temperature Range T
STG
65 to 150
_C
Lead Temperature, 1 mm from Case for 10 Seconds T
L
260
_C
Junction Temperature under Bias T
J
150
_C
Thermal Resistance SC70−5/SC−88A (Note 1)
TSOP−5
JA
350
230
_C/W
Power Dissipation in Still Air at 85_C SC70−5/SC−88A
TSOP−5
P
D
150
200
mW
Moisture Sensitivity MSL Level 1
Flammability Rating Oxygen Index: 30% − 35% F
R
UL 94 V−0 @ 0.125 in
ESD Withstand Voltage Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
V
ESD
> 2000
> 100
N/A
V
Latchup Performance Above V
CC
and Below GND at 85_C (Note 5)
I
Latchup
300 mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Parameter Symbol Min Max Unit
Positive DC Supply Voltage V
CC
2.0 5.5 V
Digital Input Voltage (Enable) V
IN
GND 5.5 V
Static or Dynamic Voltage Across an Off Switch V
IO
GND V
CC
V
Analog Input Voltage (NO, COM) V
IS
GND V
CC
V
Operating Temperature Range, All Package Types T
A
55 125
_C
Input Rise or Fall Time, V
cc
= 3.3 V 0.3 V
(Enable Input) V
cc
= 5.0 V 0.5 V
t
r
, t
f
0
0
100
20
ns/V
DEVICE JUNCTION TEMPERATURE VERSUS
TIME TO 0.1% BOND FAILURES
Junction
Temperature °C
Time, Hours Time, Years
80 1,032,200 117.8
90 419,300 47.9
100 178,700 20.4
110 79,600 9.4
120 37,000 4.2
130 17,800 2.0
140 8,900 1.0
1
1 10 100
1000
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
Figure 2. Failure Rate vs. Time Junction Temperature
NORMALIZED FAILURE RATE
TIME, YEARS
T
J
= 130_C
T
J
= 120_C
T
J
= 110_C
T
J
= 100_C
T
J
= 90_C
T
J
= 80_C
NLAST4501
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3
DC CHARACTERISTICS − Digital Section (Voltages Referenced to GND)
Symbol
Guaranteed Max Limit
Parameter Condition V
CC
*55_C to 25_C t85_C t125_C
Unit
Minimum High−Level Input
Voltage, Enable Inputs
V
IH
3.0
4.5
5.5
1.4
2.0
2.0
1.4
2.0
2.0
1.4
2.0
2.0
V
Maximum Low−Level Input
Voltage, Enable Inputs
V
IL
3.0
4.5
5.5
0.53
0.8
0.8
0.53
0.8
0.8
0.53
0.8
0.8
V
Maximum Input Leakage
Current, Enable Inputs
V
IN
= 5.5 V or GND I
IN
0 V to 5.5 V 0.1 1.0 1.0
A
Maximum Quiescent Supply
Current (per package)
Enable and VIS = V
CC
or GND I
CC
5.5 1.0 1.0 2.0
A
DC ELECTRICAL CHARACTERISTICS − Analog Section
Symbol
Guaranteed Max Limit
Parameter Condition V
CC
*55_C to 25_C t85_C t125_C
Unit
Maximum ON Resistance
(Figures 8 − 12)
V
IN
= V
IH
V
IS
= V
CC
to GND
I
Is
I = 10.0mA
R
ON
3.0
4.5
5.5
45
30
25
50
35
30
55
40
35
ON Resistance Flatness V
IN
= V
IH
I
Is
I = 10.0 mA
V
IS
= 1 V, 2 V, 3.5 V
R
FLAT(ON)
4.5 4 4 5
Off Leakage Current, Pin 2
(Figure 3)
V
IN
= V
IL
V
NO
= 1.0 V, V
COM
= 4.5 V or
V
COM
= 1.0 V and V
NO
4.5 V
I
NO(OFF)
5.5 1 10 100 nA
Off Leakage Current, Pin 1
(Figure 3)
V
IN
= V
IL
V
NO
= 4.5 V or 1.0 V
V
COM
= 1.0 V or 4.5 V
I
COM(OFF)
5.5 1 10 100 nA
AC ELECTRICAL CHARACTERISTICS (Input t
r
= t
f
= 3.0 ns)
Guaranteed Max Limit
V
CC
*55_C to 25_C t85_C t125_C
Parameter Test Conditions Symbol (V) Min Typ Max Min Typ Max Min Typ Max Unit
Turn−On Time
R
L
= 300  C
L
= 35 pF
(Figures 4, 5, and 13)
t
ON
2.0
3.0
4.5
5.5
7.0
5.0
4.5
4.5
14
10
9
9
16
12
11
11
16
12
11
11
ns
Turn−Off Time
R
L
= 300  C
L
= 35 pF
(Figures 4, 5, and 13)
t
OFF
2.0
3.0
4.5
5.5
11.0
7.0
5.0
5.0
22
14
10
10
24
16
12
12
24
16
12
12
ns
Typical @ 25, VCC = 5.0 V
Maximum Input Capacitance, Select Input
Analog I/O (switch off)
Common I/O (switch off)
Feedthrough (switch on)
C
IN
C
NO
or
C
NC
C
COM(OFF)
C
COM(ON)
8
10
10
20
pF

NLAST4501DFT2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Analog Switch ICs Single SPST Sw w/TTL Level -55 to 125 C
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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