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NCV47823PAAJR2G

P1-P3P4-P6P7-P9P10-P12P13-P15
NCV47823
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13
Table 8. DIAGNOSTIC FEATURES TRUTH TABLE
Operational Status
EN (note 10)
DE CS
Output Channel
(V
out1
or V
out2
)
Diagnostic Output
(CSO1 or CSO2)
Error Flag
(EF)
Disabled L L X Low (~0 V) Low (~0 V) HZ
Short to Battery (OFF) L H
L/H (Note 13)
High(V
out
~V
in
) Low (~0 V)
L (Note 11)
Open Load (OFF) H H L/H (Note 13) High(V
out
~V
in
) Low (~0 V)
L (Note 12)
Normal (OFF) H H L/H (Note 13) Low (~0 V) Low (~0 V) HZ (Note 12)
Open Load (ON) H L L/H (Note 13) High(V
out
~V
in
) Low (~0 V) HZ
Switch H L L/H (Note 13) I
out
<I
out_SET
Proportional to I
out
(± 5%) (Note 15)
HZ
Current Source H L L/H (Note 13) I
out
=I
out_SET
High (~2.55 V) HZ
Short to Ground H L L/H (Note 13) Low (~0 V) High (~2.55 V) L (Note 14)
10.State of EN pin of appropriate channel
11. Internal current source turned OFF (between V
out
and V
in
of appropriate channel)
12.Internal current source turned ON (between V
out
and V
in
of appropriate channel)
13.CS = L means CH1 diagnostics and CS = H means CH2 diagnostics (e.g. when CS = L and EF = L then failure at CH1 observed, when CS
= H and EF = L then failure at CH2 observed)
14.STG is considered as fault when V
out
< 3 V
15.Valid for I
out
= 50 mA to 350 mA. For I
out
= 10 mA to 50 mA range proportional to I
out
(± 15%).
Thermal Considerations
As power in the device increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and the ambient temperature
affect the rate of junction temperature rise for the part. When
the device has good thermal conductivity through the PCB,
the junction temperature will be relatively low with high
power applications. The maximum dissipation the device
can handle is given by:
P
D(MAX)
+
ƪ
T
J(MAX)
* T
A
ƫ
R
qJA
(eq. 9)
Since T
J
is not recommended to exceed 150_C, then the
device soldered on 645 mm
2
, 1 oz copper area, FR4 can
dissipate up to 2.38 W when the ambient temperature (T
A
)
is 25_C. See Figure 15 for R
θ
JA
versus PCB area. The power
dissipated by the device can be calculated from the
following equations:
P
D
[ V
in
ǒ
I
q
@I
out1,2
Ǔ
) I
out1
ǒ
V
in
−V
out1
Ǔ
) I
out2
ǒ
V
in
−V
out2
Ǔ
(eq. 10)
or
V
in(MAX)
[
P
D(MAX)
)
ǒ
V
out1
I
out1
Ǔ
)
ǒ
V
out2
I
out2
Ǔ
I
out1
) I
out2
) I
q
(eq. 11)
Figure 15. Thermal Resistance vs. PCB Copper Area
COPPER HEAT SPREADER AREA (mm
2
)
600 7005004003002001000
20
30
50
70
80
100
110
130
R
q
JA
, THERMAL RESISTANCE (°C/W)
40
60
90
120
1 oz, Single Layer
2 oz, Single Layer
1 oz, 4 Layer
2 oz, 4 Layer
NCV47823
www.onsemi.com
14
Hints
V
in
and GND printed circuit board traces should be as
wide as possible. When the impedance of these traces is
high, there is a chance to pick up noise or cause the regulator
to malfunction. Place external components, especially the
output capacitor, as close as possible to the device and make
traces as short as possible.
The Output Voltage Monitoring Output is high impedance
output (see Figure 2) and during OFF state diagnostics it
may be prone to couple a noise via PCB track or wire.
Disturbing may appear as Error Flag Output oscillation
when Output Voltage Level is close to Short to Battery
threshold. To improve robustness connect capacitor
(typically 10 nF) between each V
out_FB1,2
pin and GND as
close as possible to the V
out_FB1,2
pins.
The Current Sense Output is internally connected to an
input of error amplifier and may be prone to couple a noise
via long PCB track or wire (e.g. connection to an ADC). In
case of long PCB track or wire connected to CSO pin it is
recommended to use RC filter for noise suppression (see
Figure 16 and Table 9) in cost of higher inrush current. The
R value of the RC filter can be higher than value listed in
Table 9, depending on acceptable of RC time constant. The
higher is R value the lower is inrush current. Value of C =
10 nF is optimized for noise suppression and as low as
possible inrush current.
Figure 16. RF Filter Connection
Table 9. INRUSH CURRENT AND RECOMMENDED RC VALUES
(Test Conditions: V
in
= 13.5 V, V
out
= short to GND, V
EN
= pulse from 0 V to 5 V)
Rcso (kW)
Calculated Current Limit
(mA) (Note 16)
Inrush Current without RC
(mA)
minimum R (kW)
C (nF) Inrush Current with RC
(mA) with minimum R
68 11 75 22 10 65
15 51 108 22 10 124
8.2 93 133 33 10 145
5.1 150 159 33 10 182
3.9 183 211 33 10 231
3.3 216 248 33 10 270
2.7 264 308 22 10 338
2.2 325 376 15 10 415
16.Calculated ILIM is for Vout = Vin − 1 V.
ORDERING INFORMATION
Device Marking Package Shipping
†
NCV47823PAAJR2G Line1: NCV4
Line2: 7823
TSSOP−14 EP
(Pb−Free)
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D
NCV47823
www.onsemi.com
15
PACKAGE DIMENSIONS
TSSOP−14 EP
CASE 948AW
ISSUE C
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION SHALL BE
0.07 mm MAX. AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER RADI-
US OF THE FOOT. MINIMUM SPACE BETWEEN PRO-
TRUSION AND ADJACENT LEAD IS 0.07.
4. DIMENSION D DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED
0.15 mm PER SIDE. DIMENSION D IS DETERMINED AT
DATUM H.
5. DIMENSION E1 DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSIONS. INTERLEAD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.25 mm PER
SIDE. DIMENSION E1 IS DETERMINED AT DATUM H.
6. DATUMS A AND B ARE DETERMINED AT DATUM H.
7. A1 IS DEFINED AS THE VERTICAL DISTANCE FROM
THE SEATING PLANE TO THE LOWEST POINT ON THE
PACKAGE BODY.
8. SECTION B−B TO BE DETERMINED AT 0.10 TO 0.25 mm
FROM THE LEAD TIP.
DIM MIN MAX
MILLIMETERS
A −−−− 1.20
b 0.19 0.30
c 0.09 0.20
A1 0.05 0.15
L 0.45 0.75
M 0 8
__
6.70
14X
0.42
14X
1.15
0.65
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT
E 6.40 BSC
L2 0.25 BSC
RECOMMENDED
3.06
3.40
SECTION B−B
c
c1
b
b1
A2 0.80 1.05
b1 0.19 0.25
c1 0.09 0.16
D 4.90 5.10
D2 3.09 3.62
E1 4.30 4.50
E2 2.69 3.22
0.65 BSCe
SEATING
PLANE
A2
M
L
DETAIL A
END VIEW
PIN 1
7
1
14 8
TOP VIEW
E1
SIDE VIEW
REFERENCE
0.20 C
NOTE 5
2X 14 TIPS
B
0.10 C
C
A
14X
c
DETAIL A
A1
B
B
E2
BOTTOM VIEW
D2
b
0.10
C
NOTE 3
B A
14X
0.05 C
D
NOTE 4
GAUGE
PLANE
C
NOTE 7
H
L2
E
e
BA
NOTE 6
NOTE 8
A
NOTE 6
SS
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NCV47823PAAJR2G

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Power Switch ICs - Power Distribution DUAL HIGH SIDE SWITCH
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