13
© 2005 Semtech Corp.
www.semtech.com
POWER MANAGEMENT
SC4501
with
V
4
.
1
V
L
> .
Example: Increase the turn on voltage of a V
IN
= 3.3V boost
converter from 1.4V to 2.75V.
Using V
H
= 2.75V and R
4
= 100KΩ in (12),
Ω=
K
150
3
.
The resulting UVLO hysteresis is:
V
69
.
0
K
150
A
6
.
4
I
V
3HYSHYS
=Ωμ== .
SC4501
R4
R3
SHDN
3 +
-
IN
6/8
1.1V
4.6μA
I
HYS
COMPARATOR
Y
SWITCH CLOSED
WHEN Y = “1”
Figure 7. Programmable Hysteretic UVLO Circuit
The turn off voltage is:
V
4
.
1
V
06
.
2
69
.
0
75
.
2
V
V
V
HYSHL
>=== .
Frequency Compensation
Figure 8 shows the equivalent circuit of a boost converter
using the SC4501. The output filter capacitor and the load
form an output pole at frequency:
2OUT2OUT
OUT
2p
CR
2
CV
I
2
==ω
(13)
where C
2
is the output capacitor and
OUT
OUT
OUT
I
V
R =
is the
equivalent load resistance.
The zero formed by C
2
and its equivalent series resistance
(ESR) is neglected due to low ESR of the ceramic output
capacitor.
There is also a right half plane (RHP) zero at angular
frequency:
()
L
D1R
2
OUT
2Z
=ω
(14)
ω
z2
decreases with increasing duty cycle D and increasing
I
OUT
. Using the 5V to 12V boost regulator (1.35MHz) in
Figure 1(a) as an example,
Ω= 8.6
A
74
.
0
V
5
R
OUT
POWER
STAGE
REFERENCE
VOLTAGE
1.242V
Gm
-
+
R3
C4
C6
RO R2
COMP
R1
FB
C5
ESR
C2
R
OUT
V
OUT
V
IN
I
OUT
Figure 8. Simplified Block Diagram of a Boost Converter
Application Information
2011
14
© 2005 Semtech Corp.
www.semtech.com
POWER MANAGEMENT
SC4501
62.0
5
.
0
12
3.0
1
5.012
5
1
D =
+
+
=
Therefore
()
()
KHz68.4Krads4.29
F108.6
2
1
2p
==
μΩ
ω
and
()
KHz3.33Krads209
H7.4
62.018.6
1
2
2Z
==
μ
Ω
ω
The spacing between p
2
and z
2
is the closest when the
converter is delivering the maximum output current from
the lowest V
IN
. This represents the worst-case compensation
condition. Ignoring C
5
and C
6
for the moment, C
4
forms a
low frequency pole with the equivalent output resistance
R
O
of the error amplifier:
Ω=
Ωμ
==
M7.4
60
dB
49
cetancTranscondu
Gain
Loop
Open
Amplifier
R
1
O
Hz41rads260
pF820M7.4
1
CR
1
1
4O
1p
==
Ω
==ω
C
4
and R
3
also forms a zero with angular frequency:
KHz3.6Krads5.39
pF820K9.30
1
CR
1
1
43
1Z
==
Ω
==ω
The poles p
1
, p
2
and the RHP zero z
2
all increase phase
shift in the loop response. For stable operation, the overall
loop gain should cross 0dB with -20dB/decade slope. Due
to the presence of the RHP zero, the 0dB crossover frequency
should not be higher than
3
z
2
. Placing z
1
near p
2
nulls its
effect and maximizes loop bandwidth. Thus
)MAX(OUT
2OUT
43
I2
C
V
CR
(15)
R
3
determines the mid-band loop gain of the converter.
IncreasingR
3
increases the mid-band gain and the crossover
Application Information
Figure 9. Suggested PCB Layout for the SC4501. Notice that there is no via
directly under the device. All vias are 12mil in diameter.
U1
VOUT
SHDN
R1 C5
C1
L1
D1
VIN
U1
C3 R4
C4
R3
C6
R2
GND
C2
U1
VOUT
SHDN
SHDN
R1 C5
C1
L1
D1
VIN
U1
C3 R4
C4
R3
C6
R2
GND
C2
2011
15
© 2005 Semtech Corp.
www.semtech.com
POWER MANAGEMENT
SC4501
frequency. However it reduces the phase margin. The
values of R
3
and C
4
can be determined empirically by
observing the inductor current and the output voltage
during load transient. Compensation is optimized when
the largest R
3
and the smallest C
4
without producing
ringing or excessive overshoot in its inductor current and
output voltage are found. Figures 10(b), 11(c), 12(b) and
12(c) show load transient responses of empirically
optimized DC-DC converters. In a battery-operated
system, compensating for the minimum V
IN
and the
maximum load step will ensure stable operation over the
entire input voltage range.
C
5
adds a feedforward zero to the loop response. In some
cases it improves the transient speed of the converter. C
6
rolls off the gain at high frequency. This helps to stabilize
the loop. C
5
and C
6
are often not needed.
Board Layout Considerations
In a step-up switching regulator, the output filter capacitor,
the main power switch and the rectifying diode carry
switched currents with high di/dt. For jitter-free operation,
Application Information
the size of the loop formed by these components should
be minimized. Since the power switch is integrated inside
the SC4501, grounding the output filter capacitor next to
the SC4501 ground pin minimizes size of the high di/dt
current loop. The input bypass capacitors should also be
placed close to the input pins. Shortening the trace at the
SW node reduces the parasitic trace inductance. This not
only reduces EMI but also decreases the sizes of the
switching voltage spikes and glitches.
Figure 9 shows how various external components are placed
around the SC4501. The frequency-setting resistor should
be placed near the ROSC pin with a short ground trace
on the PC board. These precautions reduce switching
noise pickup at the ROSC pin.
To achieve a junction to ambient thermal resistance (θ
JA
)
of 40°C/W, the exposed pad of the SC4501 should be
properly soldered to a large ground plane. Use only 12mil
diameter vias in the ground plane if necessary. Avoid using
larger vias under the device. Molten solder may seep
through large vias during reflow, resulting in poor adhesion,
poor thermal conductivity and low reliability.
Typical Application Circuits
Upper Trace : Output Voltage, AC Coupled, 1V/div
Lower Trace : Inductor Current, 0.5A/div
40μs/div
Figure 10(b). Load Transient Response of the Circuit in Figure
10(a). I
LOAD
is switched between 0.1A and 0.4A at
1A/μs.
C1
2.2μF
3.3V
VIN
VOUT
SC4501
2
3
1
5
6
4
GND
SHDN
SS
IN SW
FB
ROSC
COMP
8
7
ONOFF
C3
C4
10BQ015
C2
R2
R1
R3
R4
D1
L1
3.3μH
10μF
47nF
1.5nF
20K
22.1K
174K
12V, 0.4A
9.31K
Figure 10(a). 1.35 MHz All Ceramic Capacitor 3.3V to 12V Boost
L1: Cooper-Bussmann SD25-3R3
Converter. Pinout Shown is for MSOP-8
2011

SC4501MLTRT

Mfr. #:
Manufacturer:
Semtech
Description:
Switching Voltage Regulators 2AMP,2MHZ STEP-UP SW REG W/SS
Lifecycle:
New from this manufacturer.
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