NLV17SZ125DFT2G

© Semiconductor Components Industries, LLC, 2015
June, 2015 − Rev. 18
1 Publication Order Number:
NL17SZ125/D
NL17SZ125
Non-Inverting 3-State Buffer
The NL17SZ125 is a high performance non−inverting buffer operating
from a 1.65 V to 5.5 V supply.
Features
Extremely High Speed: t
PD
2.6 ns (typical) at V
CC
= 5.0 V
Designed for 1.65 V to 5.5 V V
CC
Operation
Overvoltage Tolerant Inputs and Outputs
LVTTL Compatible − Interface Capability With 5.0 V TTL Logic
with V
CC
= 3.0 V
LVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current Substantially Reduces System
Power Requirements
3−State OE Input is Active−Low
Replacement for NC7SZ125
Chip Complexity = 36 FETs
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
IN A
OUT Y
EN
OE
Figure 1. Logic Symbol
SC−88A (SOT−353)
DF SUFFIX
CASE 419A
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
ORDERING INFORMATION
MARKING DIAGRAMS
www.onsemi.com
SOT−553
XV5 SUFFIX
CASE 463B
M0 MG
G
M0 or F = Specific Device Code
(F with 90 degree clockwise rotation)
M = Date Code
G = Pb−Free Package
M0 MG
G
1
5
M0 MG
G
TSOP−5
DT SUFFIX
CASE 483
1
5
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
UDFN6
1.0 x 1.0
CASE 517BX
M
1
Y
SOT−953
CASE 527AE
M
1
F
NL17SZ125
www.onsemi.com
2
Figure 2. Pinout (Top View)
V
CC
OE
IN A
OUT Y
GND
1
2
3
4
5
(SOT−353/TSOP−5/SC−88A/
SOT−553)
V
CC
OE
IN A
OUT Y
GND
1
2
3
5
4
SOT−953
V
CC
OE
IN A
OUT
Y
GND
1
2
3
5
4
6
NC
UDFN6
PIN ASSIGNMENT (SOT−353/
TSOP−5/SC−88A/SOT−553)
Pin
1
2
3
4
5
Function
OE
IN A
GND
OUT Y
V
CC
Input
FUNCTION TABLE
A
L
H
X
Output
Y
L
H
Z
OE
L
L
H
PIN ASSIGNMENT (SOT−953)
Pin
1
2
3
4
5
Function
IN A
GND
OE
OUT Y
V
CC
X = Don’t Care
PIN ASSIGNMENT (UDFN)
Pin
1
2
3
4
5
Function
OE
IN A
GND
OUT Y
NC
6V
CC
NL17SZ125
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3
MAXIMUM RATINGS
Symbol Parameter Value Units
V
CC
DC Supply Voltage −0.5 to +7.0 V
V
IN
DC Input Voltage −0.5 to +7.0 V
V
OUT
DC Output Voltage
(SOT−353/TSOP−5/SC−88A/SOT−553/UDFN Packages) Power−Down Mode
−0.5 to +7.0 V
V
OUT
DC Output Voltage
(SOT−953 Package)
−0.5 to V
CC
+0.5 V
I
IK
DC Input Diode Current −50 mA
I
OK
DC Output Diode Current V
OUT
< GND, V
OUT
> V
CC
(SOT−953 Package)
±50 mA
I
OK
DC Output Diode Current V
OUT
< GND
(SOT−353/SC70−5/SC−88A/SOT−553 Packages)
−50 mA
I
OUT
DC Output Sink Current ±50 mA
I
CC
DC Supply Current per Supply Pin ±100 mA
T
STG
Storage Temperature Range −65 to +150 °C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds 260 °C
T
J
Junction Temperature Under Bias +150 °C
q
JA
Thermal Resistance (Note 1)
SC−88A/SOT−553
TSOP−5
350
230
°C/W
P
D
Power Dissipation in Still Air at 85°C 150 mW
MSL Moisture Sensitivity Level 1
F
R
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
V
ESD
ESD Withstand Voltage
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
u2000
u200
N/A
V
I
LATCHUP
Latchup Performance Above V
CC
and Below GND at 125°C (Note 5) ±100 mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA/JESD78.

NLV17SZ125DFT2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Buffers & Line Drivers CMOS BUFR LOG LEVL
Lifecycle:
New from this manufacturer.
Delivery:
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