ADR293
Rev. D | Page 10 of 12
THEORY OF OPERATION
The ADR293 uses a new reference generation technique known
as XFET, which yields a reference with low noise, low supply
current, and very low thermal hysteresis.
The core of the XFET reference consists of two junction field
effect transistors, one of which has an extra channel implant to
raise its pinch-off voltage. By running the two JFETs at the same
drain current, the difference in pinch-off voltage can be amplified
and used to form a highly stable voltage reference. The intrinsic
reference voltage is around 0.5 V with a negative temperature
coefficient of about –120 ppm/K. This slope is essentially locked
to the dielectric constant of silicon and can be closely compen-
sated by adding a correction term generated in the same fashion
as the proportional-to-temperature (PTAT) term used to
compensate band gap references. The big advantage over a band
gap reference is that the intrinsic temperature coefficient is
some 30 times lower (therefore, less correction is needed) and
this results in much lower noise, because most of the noise of a
band gap reference comes from the temperature compensation
circuitry.
The simplified schematic in Figure 21 shows the basic topology
of the ADR293. The temperature correction term is provided by
a current source with value designed to be proportional to
absolute temperature. The general equation is
()
()
R3I
R1
R3R2R1
VV
PTAT
P
OUT
+
⎟
⎠
⎞
⎜
⎝
⎛
++
Δ=
where:
ΔV
P
is the difference in pinch-off voltage between the two FETs.
I
PTAT
is the positive temperature coefficient correction current.
The process used for the XFET reference also features vertical
NPN and PNP transistors, the latter of which are used as output
devices to provide a very low dropout voltage.
V
OUT
IN
I
PTAT
GND
R1
R2
R3
I
1
I
1
1
1
EXTRA CHANNEL IMPLANT
V
OUT
=×∆V
P
+ I
PTAT
× R3
R1 + R2 + R3
R1
∆V
P
00164-021
Figure 21. Simplified Schematic
DEVICE POWER DISSIPATION CONSIDERATIONS
The ADR293 is guaranteed to deliver load currents to 5 mA
with an input voltage that ranges from 5.5 V to 15 V. When
this device is used in applications with large input voltages,
care should be exercised to avoid exceeding the published
specifications for maximum power dissipation or junction
temperature that could result in premature device failure.
The following formula should be used to calculate a device’s
maximum junction temperature or dissipation:
JA
A
J
D
TT
P
θ
=
where:
T
J
and T
A
are the junction temperature and ambient
temperature, respectively.
P
D
is the device power dissipation.
θ
JA
is the device package thermal resistance.
BASIC VOLTAGE REFERENCE CONNECTIONS
References, in general, require a bypass capacitor connected
from the V
OUT
pin to the GND pin. The circuit in Figure 22
illustrates the basic configuration for the ADR293. Note that the
decoupling capacitors are not required for circuit stability.
NC
NC
NC
NC
V
OUT
NC
0.1µF
0.1µF
10µF
+
NC = NO CONNECT
1
2
3
4
8
7
6
5
00164-022
ADR293
Figure 22. Basic Voltage Reference Configuration
NOISE PERFORMANCE
The noise generated by the ADR293 is typically less than
15 μV p-p over the 0.1 Hz to 10 Hz band. The noise measure-
ment is made with a band-pass filter made of a 2-pole high-pass
filter with a corner frequency at 0.1 Hz and a 2-pole low-pass
filter with a corner frequency at 10 Hz.
TURN-ON TIME
Upon application of power (cold start), the time required for
the output voltage to reach its final value within a specified
error band is defined as the turn-on settling time. Two
components normally associated with this are the time for the
active circuits to settle and the time for the thermal gradients on
the chip to stabilize. Figure 15 shows the typical turn-on time
for the ADR293.
