ZL30155GGG2

1
Copyright 2011, Microsemi Corporation. All Rights Reserved.
Features
Two independent clock channels
Programmable synthesizers generate any clock-
rate from 1 kHz to 750 MHz
Two precision synthesizers generate clocks with
jitter below 0.7 ps RMS for 10 G PHYs
Programmable digital PLLs synchronize to any
clock rate from 1 kHz to 750 MHz
Flexible two-stage architecture translates between
arbitrary data rates, line coding rates and FEC
rates
Digital PLLs filter jitter from 14 Hz, 28 Hz, 56 Hz,
112 Hz, 224 Hz, 448 Hz or 896 Hz
Automatic hitless reference switching and digital
holdover on reference fail
Four reference inputs configurable as single ended
or differential
Eight LVPECL outputs and four LVCMOS outputs
Operates from a single crystal resonator or clock
oscillator
Configurable via SPI/I2C interface
Applications
10 Gigabit line cards
Synchronous Ethernet, 10 GBASE-R and
10 GBASE-W
OTN multiplexers and transponders
SONET/SDH, Fibre Channel, XAUI
January 2012
Figure 1 - Functional Block Diagram
ZL30155
Dual Channel Universal Clock Translator
Short Form Data Sheet
Ordering Information
ZL30155GGG 100 Pin LBGA Trays
ZL30155GGG2 100 Pin LBGA* Trays
*Pb Free Tin/Silver/Copper
-40
o
C to +85
o
C
ZL30155 Short Form Data Sheet
2
Microsemi Corporation
Mechanical Drawing
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ZLxxxxx
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ZL30155GGG2

Mfr. #:
Manufacturer:
Microchip / Microsemi
Description:
Clock Generators & Support Products Pb Free Dual Ch Univ Clock Translator
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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