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ADG1634BCPZ-REEL7

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19
4.5 Ω R
ON
, Triple/Quad SPDT ±5 V,
+12 V, +5 V, and +3.3 V Switches
Data Sheet
ADG1633/ADG1634
Rev. B Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2009–2016 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
4.5 Ω typical on resistance
1 Ω on-resistance flatness
Up to 206 mA continuous current
±3.3 V to ±8 V dual-supply operation
3.3 V to 16 V single-supply operation
No V
L
supply required
3 V logic-compatible inputs
Rail-to-rail operation
ADG1633
16-lead TSSOP and 16-lead, 3 mm × 3 mm LFCSP
ADG1634
20-lead TSSOP and 20-lead, 4 mm × 4 mm LFCSP
APPLICATIONS
Communication systems
Medical systems
Audio signal routing
Video signal routing
Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Relay replacements
GENERAL DESCRIPTION
The ADG1633 and ADG1634 are monolithic industrial CMOS
(iCMOS®) analog switches comprising three independently
selectable single-pole, double-throw (SPDT) switches and
four independently selectable SPDT switches, respectively.
All channels exhibit break-before-make switching action that
prevents momentary shorting when switching channels. An
EN
input on the ADG1633 (LFCSP and TSSOP packages) and
ADG1634 (LFCSP package only) is used to enable or disable
the devices. When disabled, all channels are switched off.
The ultralow on resistance and on-resistance flatness of these
switches make them ideal solutions for data acquisition and gain
switching applications, where low distortion is critical. iCMOS
construction ensures ultralow power dissipation, making the parts
ideally suited for portable and battery-powered instruments.
FUNCTIONAL BLOCK DIAGRAMS
IN1
IN2
IN3
EN
S1A
D1
S1B
S2B
D2
S2A
S3B
D3
S3A
LOGIC
ADG1633
SWITCHES SHOWN FOR
A 1 INPUT LOGIC.
08319-001
Figure 1. ADG1633 TSSOP and LFCSP
S1A
D1
S1B
IN1
IN2
S2B
S2A
D2
S4A
D4
S4B
IN4
IN3
S3B
S3A
D3
ADG1634
SWITCHES SHOWN FOR
A 1 INPUT LOGIC.
08319-002
Figure 2. ADG1634 TSSOP
S1A
D1
S1B
S2B
S2A
D2
S4A
D4
IN1 IN2 IN3 IN4
S4B
S3B
S3A
D3
ADG1634
SWITCHES SHOWN FOR
A 1 INPUT LOGIC.
LOGIC
EN
08319-003
Figure 3. ADG1634 LFCSP
ADG1633/ADG1634 Data Sheet
Rev. B | Page 2 of 19
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams ............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
±5 V Dual Supply ......................................................................... 3
12 V Single Supply ........................................................................ 4
5 V Single Supply .......................................................................... 5
3.3 V Single Supply ....................................................................... 6
Continuous Current per Channel, S or D ..................................7
Absolute Maximum Ratings ............................................................8
ESD Caution...................................................................................8
Pin Configurations and Function Descriptions ............................9
Typical Performance Characteristics ........................................... 11
Test Circuits ..................................................................................... 14
Terminology .................................................................................... 16
Outline Dimensions ....................................................................... 17
Ordering Guide .......................................................................... 19
REVISION HISTORY
8/2016—Rev. A to Rev. B
Changed CP-20-4 to CP-20-10 .................................... Throughout
Changes to Figure 5 .......................................................................... 9
Changes to Figure 7 ........................................................................ 10
Updated Outline Dimensions ....................................................... 18
Changes to Ordering Guide .......................................................... 19
9/2014—Rev. 0 to Rev. A
Changes to Figure 26, Figure 27, Figure 28 ................................. 14
Updated Outline Dimensions ....................................................... 17
Changes to Ordering Guide .......................................................... 19
7/2009—Revision 0: Initial Version
Data Sheet ADG1633/ADG1634
Rev. B | Page 3 of 19
SPECIFICATIONS
±5 V DUAL SUPPLY
V
DD
= +5 V ± 10%, V
SS
= −5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Parameter 25°C
−40°C to
+85°C
−40°C to
+125°C Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
V
DD
to V
SS
V
On Resistance (R
ON
) 4.5 Ω typ V
S
= ±4.5 V, I
S
= −10 mA; see Figure 26
5 7 8 Ω max V
DD
= ±4.5 V, V
SS
= ±4.5 V
On-Resistance Match Between Channels (∆R
ON
) 0.12 Ω typ V
S
= ±4.5 V, I
S
= −10 mA
0.25 0.3 0.35 Ω max
On-Resistance Flatness (R
FLAT(ON)
) 1 Ω typ V
S
= ±4.5 V, I
S
= −10 mA
1.3 1.7 2 Ω max
LEAKAGE CURRENTS V
DD
= +5.5 V, V
SS
= −5.5 V
Source Off Leakage, I
S
(Off) ±0.01 nA typ
V
S
= ±4.5 V, V
D
= ±4.5 V; see Figure 27
±0.1 ±1.5 ±12 nA max
Drain Off Leakage, I
D
(Off) ±0.02 nA typ
V
S
= ±4.5V, V
D
= ±4.5 V; see Figure 27
±0.15 ±2 ±20 nA max
Channel On Leakage, I
D
, I
S
(On) ±0.02 nA typ V
S
= V
D
= ±4.5 V; see Figure 28
±0.15 ±2 ±20 nA max
DIGITAL INPUTS
Input High Voltage, V
INH
2.0 V min
Input Low Voltage, V
INL
0.8 V max
Input Current, I
INL
or I
INH
nA typ
V
IN
= V
GND
or V
DD
±0.1 µA max
Digital Input Capacitance, C
IN
8 pF typ
DYNAMIC CHARACTERISTICS
1
Transition Time, t
TRANSITION
161 ns typ R
L
= 300 Ω, C
L
= 35 pF
200 236 264 ns max V
S
= 2.5 V; see Figure 29
t
ON
(EN)
61 ns typ R
L
= 300 Ω, C
L
= 35 pF
79 88 98 ns max V
S
= 2.5 V; see Figure 31
t
OFF
(EN)
ns typ
R
L
= 300 Ω, C
L
= 35 pF
199 232 259 ns max V
S
= 2.5 V; see Figure 31
Break-Before-Make Time Delay, t
D
44 ns typ R
L
= 300 Ω, C
L
= 35 pF
30 ns min V
S1
= V
S2
= 2.5 V; see Figure 30
Charge Injection −12.5 pC typ V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF; see Figure 32
Off Isolation −64 dB typ
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz;
see Figure 33
Channel-to-Channel Crosstalk −64 dB typ
R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz;
see Figure 35
Total Harmonic Distortion + Noise (THD + N) 0.3 % typ
R
L
= 110 Ω, V
S
= 5 V p-p, f = 20 Hz to
20 kHz; see Figure 36
−3 dB Bandwidth
MHz typ
R
L
= 50 Ω, C
L
= 5 pF; see Figure 34
C
S
(Off) 19 pF typ V
S
= 0 V, f = 1 MHz
C
D
(Off) 33 pF typ V
S
= 0 V, f = 1 MHz
C
D
, C
S
(On) 57 pF typ V
S
= 0 V, f = 1 MHz
POWER REQUIREMENTS V
DD
= +5.5 V, V
SS
= −5.5 V
I
DD
0.001 µA typ Digital inputs = 0 V or V
DD
1.0 µA max
V
DD
/V
SS
±3.3/±8 V min/max
1
Guaranteed by design, but not subject to production test.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19

ADG1634BCPZ-REEL7

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Manufacturer:
Analog Devices Inc.
Description:
Analog Switch ICs IC 4.5 Ohm 16V Triple/Quad SPDT
Lifecycle:
New from this manufacturer.
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