MAX2121
Complete Direct-Conversion L-Band Tuner
17
Integer portion:
N = 80
N[14:8] = 0
N[7:0] = 0101 0000
Fractional portion:
F = 0.370370 x 2
20
= 388,361 (round up the decimal portion)
F = 0101 1110 1101 0000 1001
Note: When changing LO frequencies, all the divider
registers (integer and fractional) must be programmed
to activate the VAS function regardless of whether indi-
vidual registers are changed.
VCO Autoselect (VAS)
The MAX2121 includes 24 VCOs. The local oscillator
frequency can be manually selected by programming
the VCO[4:0] bits in the VCO register. The selected VCO
is reported in the Status Byte-2 register (see Table 15).
Alternatively, the MAX2121 can be set to autonomously
choose a VCO by setting the VAS bit in the VCO regis-
ter to logic-high. The VAS routine is initiated once the
F-Divider LSB register word (register 5) is loaded.
Thus it is important to write register 5 after any of the
following PLL related bits have been changed:
N-Divider bits (registers 1 and/or 2)
F-Divider bits (registers 3 and/or 4)
Reference Divider bits (register 6)
D24, CPS, or ICP bits (register 7)
This will ensure all intended bits have been pro-
grammed before the VAS is initiated and the PLL is
locked. The VCO value programmed in the VCO[4:0]
register serves as the starting point for the automatic
VCO selection process.
During the selection process, the VASE bit in the Status
Byte-1 register is cleared to indicate the autoselection
function is active. Upon successful completion, bits VASE
and VASA are set and the VCO selected is reported in the
Status Byte-2 register (see Table 15). If the search is
unsuccessful, VASA is cleared and VASE is set. This indi-
cates that searching has ended but no good VCO has
been found, and occurs when trying to tune to a frequen-
cy outside the VCO’s specified frequency range.
Refer to Application Note 4256:
Extended Characterization
for the MAX2112/MAX2120 Satellite Tuners
.
3-Bit ADC
The MAX2121 has an internal 3-bit ADC connected to
the VCO tune pin (TUNEVCO). This ADC can be used
for checking the lock status of the VCOs.
Table 17 summarizes the ADC output bits and the VCO
lock indication. The VCO autoselect routine only selects
a VCO in the “VAS locked” range. This allows room for
a VCO to drift over temperature and remain in a valid
“locked” range.
The ADC must first be enabled by setting the ADE bit in
the VCO register. The ADC reading is latched by a sub-
sequent programming of the ADC latch bit (ADL = 1).
The ADC value is reported in the Status Byte-2 register
(see Table 15).
Standby Mode
The MAX2121 features normal operating mode and
standby mode using the I
2
C interface. Setting a logic-
high to the STBY bit in the Control register puts the
device into standby mode, during which only the 2-
wire-compatible bus, the crystal oscillator, the XTAL
buffer, and the XTAL buffer divider are active.
In all cases, register settings loaded prior to entering
shutdown are saved upon transition back to active
mode. Default register values are provided for the
user’s convenience only. It is the user’s responsibility to
load all the registers no sooner than 100µs after the
device is powered up.
Layout Considerations
The MAX2121 EV kit serves as a guide for PCB layout.
Keep RF signal lines as short as possible to minimize
losses and radiation. Use controlled impedance on all
high-frequency traces. For proper operation, the
exposed paddle must be soldered evenly to the board’s
ground plane. Use abundant vias beneath the exposed
paddle for maximum heat dissipation. Use abundant
ground vias between RF traces to minimize undesired
coupling. Bypass each V
CC
pin to ground with a 1nF
capacitor placed as close as possible to the pin.
Table 17. ADC Trip Points and Lock Status
