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MC74VHCT32ADR2

P1-P3P4-P6P7-P7
MC74VHCT32A
http://onsemi.com
4
AC ELECTRICAL CHARACTERISTICS (Input t
r
= t
f
= 3.0 ns)
Symbol Parameter Test Conditions
T
A
= 25°C T
A
= − 40 to 125°C
Unit
Min Typ Max Min Max
t
PLH
,
t
PHL
Maximum Propagation Delay,
A or B to Y
V
CC
= 3.3 ± 0.3 V C
L
= 15 pF
C
L
= 50 pF
5.5
8.0
7.9
11.4
1.0
1.0
9.5
13.0
ns
V
CC
= 5.0 ± 0.5 V C
L
= 15 pF
C
L
= 50 pF
3.8
5.3
5.5
7.5
1.0
1.0
6.5
8.5
C
in
Maximum Input Capacitance 4 10 10 pF
C
PD
Power Dissipation Capacitance (Note 1)
Typical @ 25°C, V
CC
= 5.0V
pF
22
1. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
CC(OPR
)
= C
PD
V
CC
f
in
+ I
CC
/ 4 (per gate). C
PD
is used to determine the
no−load dynamic power consumption; P
D
= C
PD
V
CC
2
f
in
+ I
CC
V
CC
.
Figure 1. Switching Waveforms
C
L
*
*Includes all probe and jig capacitance
TEST
POINT
DEVICE
UNDER
TEST
OUTPUT
Figure 2. Test Circuit
GND
t
PHL
Y
A
t
PLH
1.5V
1.5V
3V
V
OL
V
OH
ORDERING INFORMATION
Device Package Shipping
†
MC74VHCT32ADR2G SOIC−14
(Pb−Free)
2500 / Tape & Reel
MC74VHCT32ADTR2G TSSOP−14* 2500 / Tape & Reel
MC74VHCT32AMG SOEIAJ−14
(Pb−Free)
50 Units / Rail
MC74VHCT32AMELG SOEIAJ−14
(Pb−Free)
2000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
MC74VHCT32A
http://onsemi.com
5
PACKAGE DIMENSIONS
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
−A−
−B−
G
P
7 PL
14
8
7
1
M
0.25 (0.010) B
M
S
B
M
0.25 (0.010) A
S
T
−T−
F
R
X 45
SEATING
PLANE
D 14 PL
K
C
J
M
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A 8.55 8.75 0.337 0.344
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
F 0.40 1.25 0.016 0.049
G 1.27 BSC 0.050 BSC
J 0.19 0.25 0.008 0.009
K 0.10 0.25 0.004 0.009
M 0 7 0 7
P 5.80 6.20 0.228 0.244
R 0.25 0.50 0.010 0.019
 
SOIC−14
CASE 751A−03
ISSUE J
7.04
14X
0.58
14X
1.52
1.27
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT
7X
MC74VHCT32A
http://onsemi.com
6
PACKAGE DIMENSIONS
TSSOP−14
DT SUFFIX
CASE 948G−01
ISSUE B
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A 4.90 5.10 0.193 0.200
B 4.30 4.50 0.169 0.177
C −−− 1.20 −−− 0.047
D 0.05 0.15 0.002 0.006
F 0.50 0.75 0.020 0.030
G 0.65 BSC 0.026 BSC
H 0.50 0.60 0.020 0.024
J 0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K 0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L 6.40 BSC 0.252 BSC
M 0 8 0 8
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.

S
U0.15 (0.006) T
2X L/2
S
U
M
0.10 (0.004) V
S
T
L
−U−
SEATING
PLANE
0.10 (0.004)
−T−
SECTION N−N
DETAIL E
J
J1
K
K1
DETAIL E
F
M
−W−
0.25 (0.010)
8
14
7
1
PIN 1
IDENT.
H
G
A
D
C
B
S
U0.15 (0.006) T
−V−
14X REFK
N
N
7.06
14X
0.36
14X
1.26
0.65
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT
P1-P3P4-P6P7-P7

MC74VHCT32ADR2

Mfr. #:
Buy MC74VHCT32ADR2
Manufacturer:
ON Semiconductor
Description:
IC GATE OR 4CH 2-INP 14SOIC
Lifecycle:
New from this manufacturer.
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