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MC74VHC04MELG

P1-P3P4-P5
© Semiconductor Components Industries, LLC, 2014
September, 2014 − Rev. 6
1 Publication Order Number:
MC74VHC04/D
MC74VHC04
Hex Inverter
The MC74VHC04 is an advanced high speed CMOS inverter
fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while
maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7 V, allowing the interface of 5 V systems
to 3 V systems.
Features
• High Speed: t
PD
= 3.8 ns (Typ) at V
CC
= 5 V
• Low Power Dissipation: I
CC
= 2 mA (Max) at T
A
= 25°C
• High Noise Immunity: V
NIH
= V
NIL
= 28% V
CC
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Designed for 2 V to 5.5 V Operating Range
• Low Noise: V
OLP
= 0.8 V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300 mA
• ESD Performance: HBM > 2000 V; Machine Model > 200 V
• Chip Complexity: 36 FETs or 9 Equivalent Gates
• These Devices are Pb−Free and are RoHS Compliant
Y1A1
A2
A3
A4
A5
A6
Y2
Y3
Y4
Y5
Y6
1
3
5
9
11
13
2
4
6
8
10
12
Y = A
Figure 1. Logic Diagram
1314 12 11 10 9 8
21 34567
V
CC
A6
Y6
A5
Y5
A4
Y4
A1
Y1
A2
Y2
A3
Y3
GND
Figure 2. Pinout:
14−Lead Packages
(Top View)
MARKING DIAGRAMS
TSSOP−14
DT SUFFIX
CASE 948G
1
SOIC−14
D SUFFIX
CASE 751A
1
http://onsemi.com
A = Assembly Location
WL, L = Wafer Lot
Y = Year
WW, W = Work Week
G or G = Pb−Free Package
VHC04G
AWLYWW
1
14
VHC
04
ALYWG
G
1
14
(Note: Microdot may be in either location)
FUNCTION TABLE
Device Package Shipping
†
ORDERING INFORMATION
MC74VHC04DR2G SOIC−14
(Pb−Free)
2500 / Tape &
Reel
MC74VHC04DTR2G TSSOP−14
(Pb−Free)
2500 / Tape &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
L
H
Inputs Outputs
A
H
L
Y
MC74VHC04
http://onsemi.com
2
MAXIMUM RATINGS
Symbol Parameter Value Unit
V
CC
DC Supply Voltage –0.5 to + 7.0 V
V
in
DC Input Voltage –0.5 to + 7.0 V
V
out
DC Output Voltage –0.5 to V
CC
+ 0.5 V
I
IK
Input Diode Current −20 mA
I
OK
Output Diode Current ± 20 mA
I
out
DC Output Current, per Pin ± 25 mA
I
CC
DC Supply Current, V
CC
and GND Pins ± 50 mA
P
D
Power Dissipation in Still Air, SOIC Package†
TSSOP Package†
500
450
mW
T
stg
Storage Temperature – 65 to + 150
_C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any
of these limits are exceeded, device functionality should not be assumed, damage may occur
and reliability may be affected.
†Derating — SOIC Package: – 7 mW/_C from 65_ to 125_C
TSSOP Package: − 6.1 mW/_C from 65_ to 125_C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
CC
DC Supply Voltage 2.0 5.5 V
V
in
DC Input Voltage 0 5.5 V
V
out
DC Output Voltage 0 V
CC
V
T
A
Operating Temperature −40 + 85
_C
t
r
, t
f
Input Rise and Fall Time V
CC
= 3.3V ±0.3V
V
CC
= 5.0V ±0.5V
0
0
100
20
ns/V
DC ELECTRICAL CHARACTERISTICS
Symbol Parameter Test Conditions
V
CC
V
T
A
= 25°C T
A
= −40 to 85°C
Uni
t
Min Typ Max Min Max
V
IH
Minimum High−Level
Input Voltage
2.0
3.0 to
5.5
1.50
V
CC
x 0.7
1.50
V
CC
x 0.7
V
V
IL
Maximum Low−Level
Input Voltage
2.0
3.0 to
5.5
0.50
V
CC
x 0.3
0.50
V
CC
x 0.3
V
V
OH
Minimum High−Level
Output Voltage
V
in
= V
IH
or V
IL
I
OH
= −50μA
2.0
3.0
4.5
1.9
2.9
4.4
2.0
3.0
4.5
1.9
2.9
4.4
V
V
in
= V
IH
or V
IL
I
OH
= −4mA
I
OH
= −8mA
3.0
4.5
2.58
3.94
2.48
3.80
V
OL
Maximum Low−Level
Output Voltage
V
in
= V
IH
or V
IL
I
OL
= 50μA
2.0
3.0
4.5
0.0
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
V
V
in
= V
IH
or V
IL
I
OL
= 4mA
I
OL
= 8mA
3.0
4.5
0.36
0.36
0.44
0.44
I
in
Maximum Input
Leakage Current
V
in
= 5.5 or GND 0 to 5.5 ± 0.1 ± 0.1 μA
I
CC
Maximum Quiescent
Supply Current
V
in
= V
CC
or GND 5.5 2.0 20.0 μA
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance cir-
cuit. For proper operation, V
in
and
V
out
should be constrained to the
range GND v (V
in
or V
out
) v V
CC
.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or V
CC
).
Unused outputs must be left open.
MC74VHC04
http://onsemi.com
3
AC ELECTRICAL CHARACTERISTICS (Input t
r
= t
f
= 3.0ns)
Symbol Parameter Test Conditions
T
A
= 25°C T
A
= −40 to 85°C
Uni
t
Min Typ Max Min Max
t
PLH
,
t
PHL
Maximum Propagation Delay,
A or B to Y
V
CC
= 3.3 ± 0.3V C
L
= 15pF
C
L
= 50pF
5.0
7.5
7.1
10.6
1.0
1.0
8.5
12.0
ns
V
CC
= 5.0 ± 0.5V C
L
= 15pF
C
L
= 50pF
3.8
5.3
5.5
7.5
1.0
1.0
6.5
8.5
C
in
Maximum Input Capacitance 4 10 10 pF
C
PD
Power Dissipation Capacitance (Per Inverter) (Note 1)
Typical @ 25°C, V
CC
= 5.0V
pF
18
1. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
CC(OPR
)
= C
PD
V
CC
f
in
+ I
CC
/6 (per buffer). C
PD
is used to determine the
no−load dynamic power consumption; P
D
= C
PD
V
CC
2
f
in
+ I
CC
V
CC
.
NOISE CHARACTERISTICS (Input t
r
= t
f
= 3.0ns, C
L
= 50pF, V
CC
= 5.0V)
Symbol
Characteristic
T
A
= 25°C
Unit
Typ Max
V
OLP
Quiet Output Maximum Dynamic V
OL
0.4 0.8 V
V
OLV
Quiet Output Minimum Dynamic V
OL
−0.4 −0.8 V
V
IHD
Minimum High Level Dynamic Input Voltage 3.5 V
V
ILD
Maximum Low Level Dynamic Input Voltage 1.5 V
Figure 3. Switching Waveforms
V
CC
GND
50%
50% V
CC
A
Y
t
PHL
t
PLH
*Includes all probe and jig capacitance
Figure 4. Test Circuit
C
L
*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
Figure 5. Input Equivalent Circuit
INPUT
P1-P3P4-P5

MC74VHC04MELG

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Manufacturer:
ON Semiconductor
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IC INVERTER 6CH 6-INP 14SOEIAJ
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