TL494, NCV494
http://onsemi.com
4
ORDERING INFORMATION
Device Package Shipping
TL494BD SOIC−16 48 Units / Rail
TL494BDG SOIC−16
(Pb−Free)
48 Units / Rail
TL494BDR2 SOIC−16 2500 Tape & Reel
TL494BDR2G SOIC−16
(Pb−Free)
2500 Tape & Reel
TL494CD SOIC−16 48 Units / Rail
TL494CDG SOIC−16
(Pb−Free)
48 Units / Rail
TL494CDR2 SOIC−16 2500 Tape & Reel
TL494CDR2G SOIC−16
(Pb−Free)
2500 Tape & Reel
TL494CN PDIP−16 25 Units / Rail
TL494CNG PDIP−16
(Pb−Free)
25 Units / Rail
TL494IN PDIP−16 25 Units / Rail
TL494ING PDIP−16
(Pb−Free)
25 Units / Rail
NCV494BDR2* SOIC−16 2500 Tape & Reel
NCV494BDR2G* SOIC−16
(Pb−Free)
2500 Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NCV494: T
low
= −40°C, T
high
= +125°C. Guaranteed by design. NCV prefix is for automotive and other applications requiring site and change
control.
TL494, NCV494
http://onsemi.com
5
Figure 1. Representative Block Diagram
Figure 2. Timing Diagram
6
R
T
C
T
5
4
Deadtime
Control
Oscillator
0.12V
0.7V
0.7mA
+
1
+
+
+
2
D
Q
Ck
+
+
3.5V
4.9V
13
Reference
Regulator
Q1
Q2
8
9
11
10
12
V
CC
V
CC
12 3 1516 14 7
Error Amp
1
Feedback PWM
Comparator Input
Ref.
Output
Gnd
UV
Lockout
Flip−
Flop
Output Control
Error Amp
2
Deadtime
Comparator
PWM
Comparator
Q
Capacitor C
T
Feedback/PWM Comp.
Deadtime Control
Flip−Flop
Clock Input
Flip−Flop
Q
Flip−Flop
Q
Output Q1
Emitter
Output Q2
Emitter
Output
Control
This device contains 46 active transistors.
TL494, NCV494
http://onsemi.com
6
APPLICATIONS INFORMATION
Description
The TL494 is a fixed−frequency pulse width modulation
control circuit, incorporating the primary building blocks
required for the control of a switching power supply. (See
Figure 1.) An internal−linear sawtooth oscillator is
frequency− programmable by two external components, R
T
and C
T
. The approximate oscillator frequency is determined
by:
f
osc
1.1
R
T
C
T
For more information refer to Figure 3.
Output pulse width modulation is accomplished by
comparison of the positive sawtooth waveform across
capacitor C
T
to either of two control signals. The NOR gates,
which drive output transistors Q1 and Q2, are enabled only
when the flip−flop clock−input line is in its low state. This
happens only during that portion of time when the sawtooth
voltage is greater than the control signals. Therefore, an
increase in control−signal amplitude causes a corresponding
linear decrease of output pulse width. (Refer to the Timing
Diagram shown in Figure 2.)
The control signals are external inputs that can be fed into
the deadtime control, the error amplifier inputs, or the
feedback input. The deadtime control comparator has an
effective 120 mV input offset which limits the minimum
output deadtime to approximately the first 4% of the
sawtooth−cycle time. This would result in a maximum duty
cycle on a given output of 96% with the output control
grounded, and 48% with it connected to the reference line.
Additional deadtime may be imposed on the output by
setting the deadtime−control input to a fixed voltage,
ranging between 0 V to 3.3 V.
Functional Table
Input/Output
Controls
Output Function
f
out
f
osc
=
Grounded Single−ended PWM @ Q1 and Q2 1.0
@ V
ref
Push−pull Operation 0.5
The pulse width modulator comparator provides a means
for the error amplifiers to adjust the output pulse width from
the maximum percent on−time, established by the deadtime
control input, down to zero, as the voltage at the feedback
pin varies from 0.5 V to 3.5 V. Both error amplifiers have a
common mode input range from −0.3 V to (V
CC
− 2V), and
may be used to sense power−supply output voltage and
current. The error−amplifier outputs are active high and are
ORed together at the noninverting input of the pulse−width
modulator comparator. With this configuration, the
amplifier that demands minimum output on time, dominates
control of the loop.
When capacitor C
T
is discharged, a positive pulse is
generated on the output of the deadtime comparator, which
clocks the pulse−steering flip−flop and inhibits the output
transistors, Q1 and Q2. With the output−control connected
to the reference line, the pulse−steering flip−flop directs the
modulated pulses to each of the two output transistors
alternately for push−pull operation. The output frequency is
equal to half that of the oscillator. Output drive can also be
taken from Q1 or Q2, when single−ended operation with a
maximum on−time of less than 50% is required. This is
desirable when the output transformer has a ringback
winding with a catch diode used for snubbing. When higher
output−drive currents are required for single−ended
operation, Q1 and Q2 may be connected in parallel, and the
output−mode pin must be tied to ground to disable the
flip−flop. The output frequency will now be equal to that of
the oscillator.
The TL494 has an internal 5.0 V reference capable of
sourcing up to 10 mA of load current for external bias
circuits. The reference has an internal accuracy of $5.0%
with a typical thermal drift of less than 50 mV over an
operating temperature range of 0° to 70°C.
Figure 3. Oscillator Frequency versus
Timing Resistance
500 k
100 k
10 k
1.0 k
500
1.0 k 2.0 k 5.0 k 10 k 20 k 50 k 100 k 200 k 500 k 1.0 M
R
T,
TIMING RESISTANCE (W)
, OSCILLATOR FREQUENCY (Hz)
f
osc
V
CC
= 15 V
0.01 mF
0.1 mF
C
T
= 0.001 mF

TL494BDR2

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Switching Controllers 40kHz 200mA PWM
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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