ISL29020IROZ-T7

4
FN6505.1
August 20, 2009
FIGURE 1. I
2
C READ TIMING DIAGRAM SAMPLE
START
W
A A
A6 A5 A4 A3 A2 A1 A0 W
A R7 R6 R5 R4 R3 R2 R1 R0 A A6 A5 A4 A3 A2 A1 A0 W A
A A AD7D6D5D4D3D2D1D0
1357
1357
123456 9 2 4 6
STOP START
SDA DRIVEN BY MASTER
DEVICE ADDRESS
SDA DRIVEN BY ISL29020
DATA BYTE0REGISTER ADDRESSDEVICE ADDRESSI
2
C DATA
SDA DRIVEN BY MASTER
SDA DRIVEN BY MASTER
2468
924689
78135789
I
2
C SDA IN
I
2
C SDA OUT
I
2
C CLK
FIGURE 2. I
2
C WRITE TIMING DIAGRAM SAMPLE
START W A A
A6 A5 A4 A3 A2 A1 A0 W
A R7 R6 R5 R4 R3 R2 R1 R0 A B7 B6 B5 B4 B3 B2 B1 B0 A
A
12615948
STOP
SDA DRIVEN BY MASTER
FUNCTIONSREGISTER ADDRESSDEVICE ADDRESS
SDA DRIVEN BY MASTER
SDA DRIVEN BY MASTER
I
2
C DATA
I
2
C SDA IN
I
2
C SDA OUT
I
2
C CLK IN
AA
345 789 234 678 123 567 9
A
FIGURE 3. I
2
C SYNC_I
2
C TIMING DIAGRAM SAMPLE
A 6 A5 A4 A3 A2 A1 A0 W A R7R6R5R4R3R2R1R0 A
A
15 4
START W ASTOPREGISTER ADDRESSDEVICE ADDRESS AREGISTER ADDRESSREGISTER ADDRESSI
2
C DATA
I
2
C SDA IN
I
2
C SDA OUT
I
2
C CLK IN
SDA DRIVEN BY MASTER SDA DRIVEN BY MASTER A
234 6789123 56789
ISL29020
5
FN6505.1
August 20, 2009
Register Set
There are three 8-bit registers in the ISL29020. Table 1 summarizes their functions.
Command Register (00 hex)
The Read/Write command register has five functions:
1. Enable: Bit 7. This bit enables the ISL29020 with logic 1
and powers down ISL29020 with logic 0.
2. Measurement Mode: Bit 6. This bit controls the two
measurement modes of the device. A logic 0 puts the
device in the one-time measurement mode in which the
device is automatically shut-down after each
measurement. A logic 1 puts the device in the continuous
measurement mode in which data is collected
continuously.
3. Light Sensing: Bit 5. This bit programs the device to do the
ambient light or the infrared (IR) light sensing. A logic 0,
requests for the ambient light sensing and a logic 1
requests for the IR sensing.
4. Timing Mode and Resolution: Bits 4, 3 and 2. These three
bits determine whether the integration time is done
internally or externally, and the number of bits for ADC. In
Internal Timing Mode, integration time is determined by
an internal oscillator (f
OSC
) and the n-bit (n = 4, 8, 12, 16)
counter inside the ADC. In External Timing Mode, the
integration time is determined by the time between two
consecutive sync_I
2
C pulse commands.
With Bit 4 set to 0, the device is configured to run in the
Internal-Timing mode. For example, the command register
content should be 1xx000xx to request 16-bit ADC in the
internal-timing mode.
With Bit 4 set to 1, the device is configured to run in the
External-Timing mode. For the external timing, the command
1xx101xx needs to be sent to request the Timer data, the
number of clock cycles counted within the duration between
the two sync pulses (refer to Table 2). The Timer count is
read from register 01h (LSB) and 02h (MSB). The command
1xx100xx needs to be sent to request the ADC conversion.
The ADC data is also read from register 01h (LSB) and 02h
(MSB).
Bits 3 and 2 determine the number of clock cycles per
conversion in the Internal-Timing mode. Changing the
number of clock cycles does more than just change the
resolution of the device. It also changes the integration
time, which the ADC uses to sample the photodiode
current signal for a measurement.
TABLE 1. REGISTER SET
ADDR REG NAME
BIT
DEFAULT765 4 3210
00h COMMAND EN MODE LIGHT RES2 RES1 RES0 RANGE1 RANGE0 00h
01h DATA
LSB
D7 D6 D5 D4 D3 D2 D1 D0 00h
02h DATA
MSB
D15 D14 D13 D12 D11 D10 D9 D8 00h
TABLE 2. WRITE ONLY REGISTERS
ADDRESS NAME FUNCTIONS/DESCRIPTION
b1xxx_xxxx sync_I
2
C Writing a logic 1 to this address bit
ends the current ADC-integration
and starts another. Used only with
External Timing Mode.
TABLE 3. ENABLE
BIT 7 OPERATION
0 Power-down the device
1 Enable the device
TABLE 4. MEASUREMENT MODE
BIT 6 OPERATION
0 One-time measurement
1 Continuous measurement
TABLE 5. LIGHT SENSING
BIT 5 OPERATION
0 Ambient light sensing
1 Infrared light sensing
TABLE 6. TIMING MODE AND RESOLUTION
BITS 4:3:2 MODE
0:0:0 Internal Timing, 16-bit ADC data output
0:0:1 Internal Timing, 12-bit ADC data output
0:1:0 Internal Timing, 8-bit ADC data output
0:1:1 Internal Timing, 4-bit ADC data output
1:0:0 External Timing, ADC data output
1:0:1 External Timing, Timer data output
1:1:0 Reserved
1:1:1 Reserved
ISL29020
6
FN6505.1
August 20, 2009
.
5. Range: Bits 1 and 0. The Full Scale Range (FSR) can be
adjusted via I
2
C using Bits 1 and 0. Table 8 lists the
possible values of FSR for the 500kΩ R
EXT
resistor.
Data Registers (01 hex and 02 hex)
The device has two 8-bit read-only registers to hold a 16-bit
data from ADC or Timer. The most significant byte is
accessed at 02 hex, and the least significant byte is
accessed at 01 hex. The registers are refreshed after every
conversion cycle.
Calculating Lux
The ISL29020’s ADC output codes, DATA, are directly
proportional to lux in the ambient light sensing, as shown in
Equation 1.
Here, E
cal
is the calculated lux reading. The constant α is
determined by the Full Scale Range and the ADC’s
maximum output counts. The constant can also be viewed
as the sensitivity: the smallest lux measurement the device
can measure, as shown in Equation 2.
Here, Range(k) is defined in Table 8. Count
max
is the
maximum output counts from the ADC.
The transfer function used for each timing mode becomes:
INTERNAL TIMING MODE
Here, n = 4, 8, 12 or 16. This is the number of ADC bits
programmed in the command register. 2
n
represents the
maximum number of counts possible from the ADC output in
Internal-Timing mode. Data is the ADC output stored in the
data registers (01 hex and 02 hex).
EXTERNAL TIMING MODE
Here, Timer sets up the ADC’s maximum count reading and
it is the number of clock cycles accrued in the integration
time (set by sync_I
2
C pulses) in External-Timing mode. It is
stored in the data registers 01h and 02h when the command
is coded as 1xx101xx. Data is the ADC output. In this mode,
the command has to be sent out again with code 1xx100xx
to request the ADC output data from registers 01h and 02h.
External Scaling Resistor R
EXT
for f
OSC
and
Range
The ISL29020 uses an external resistor R
EXT
to fix its
internal oscillator frequency, f
OSC
and the light sensing
range, Range. f
OSC
and Range are inversely proportional to
R
EXT
. For user simplicity, the proportionality constant is
referenced to 500kΩ:
Integration Time or Conversion Time
Integration time is the period during which the device’s
analog-to-digital ADC converter samples the photodiode
current signal for a measurement. Integration time, in other
words, is the time to complete the conversion of analog
photodiode current into a digital signal (number of counts).
Integration time affects the measurement resolution. For
better resolution, use a longer integration time. For short and
fast conversions, use a shorter integration time.
The ISL29020 offers user flexibility in the integration time to
balance resolution, speed and noise rejection. Integration time
can be set internally or externally by programming the bit 4 of
the command register 00(hex).
INTEGRATION TIME IN INTERNAL-TIMING MODE
Most applications will use the Internal-Timing mode. In this
mode, f
OSC
and ADC n-bits resolution determine the
integration time, t
int,
as shown in Equation 7.
where n is the number of bits of resolution and n = 4, 8, 12 or
16. 2
n
, therefore, is the number of clock cycles. n can be
programmed at the command register 00(hex) bits 3 and 2.
TABLE 7. RESOLUTION/WIDTH
BITS 3:2 NUMBER OF CLOCK CYCLES
0:0 2
16
= 65,536
0:1 2
12
= 4,096
1:0 2
8
= 256
1:1 2
4
= 16
TABLE 8. RANGE/FSR LUX
BITS
1:0 k RANGE(k)
FSR (LUX) @
ALS SENSING
FSR (LUX) @ IR
SENSING
0:0 1 Range1 1,000 Refer to page 2
0:1 2 Range2 4,000 Refer to page 2
1:0 3 Range3 16,000 Refer to page 2
1:1 4 Range4 64,000 Refer to page 2
TABLE 9. DATA REGISTERS
ADDRESS
(hex) CONTENTS
01 Least-significant byte of most recent ADC or Timer data.
02 Most-significant byte of most recent ADC or Timer data.
E
cal
α DATA×=
(EQ. 1)
α
Range k()
Count
max
----------------------------
=
(EQ. 2)
(EQ. 3)
E
Range k()
2
n
---------------------------
DATA×=
(EQ. 4)
E
Range k()
Timer
---------------------------
DATA×=
(EQ. 5)
Range
500kΩ
R
EXT
------------------
Range k()×=
(EQ. 6)
f
OSC
500kΩ
R
EXT
------------------
725× kHz=
t
int
2
n
1
f
OSC
--------------
× 2
n
R
EXT
725kHz 500kΩ×
----------------------------------------------
×==
(EQ. 7)
ISL29020

ISL29020IROZ-T7

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Optical Sensors Light to Digital Converters ISL29020IROZ LW PWR DIGTL OUTPUT LT SNSR
Lifecycle:
New from this manufacturer.
Delivery:
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