MC100LVEL38DWG

MC100LVEL38
www.onsemi.com
4
Table 4. LVPECL DC CHARACTERISTICS (V
CC
= 3.3 V; V
EE
= 0.0 V (Note 1))
Symbol
Characteristic
40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
I
EE
Power Supply Current 50 60 50 60 54 65 mA
V
OH
Output HIGH Voltage (Note 2) 2215 2295 2420 2275 2345 2420 2275 2345 2420 mV
V
OL
Output LOW Voltage (Note 2) 1470 1605 1745 1490 1595 1680 1490 1595 1680 mV
V
IH
Input HIGH Voltage (Single-Ended) 2135 2420 2135 2420 2135 2420 mV
V
IL
Input LOW Voltage (Single-Ended) 1490 1825 1490 1825 1490 1825 mV
V
BB
Output Voltage Reference 1.92 2.04 1.92 2.04 1.92 2.04 V
V
IHCMR
Input HIGH Voltage Common Mode
Range (Differential) (Note 3)
1.65 2.75 1.65 2.75 1.65 2.75 V
I
IH
Input HIGH Current 150 150 150
mA
I
IL
Input LOW Current 0.5 0.5 0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary ±0.3 V.
2. Outputs are terminated through a 50 W resistor to V
CC
2.0 V.
3. V
IHCMR
min varies 1:1 with V
EE
, max varies 1:1 with V
CC
. The V
IHCMR
range is referenced to the most positive side of the differential input signal.
Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between V
PP
Min
and 1.0 V.
Table 5. LVNECL DC CHARACTERISTICS (V
CC
= 0.0 V; V
EE
= 3.3 V (Note 1))
Symbol Characteristic
40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
I
EE
Power Supply Current 50 60 50 60 54 65 mA
V
OH
Output HIGH Voltage (Note 2) 1085 1005 880 1025 955 880 1025 955 880 mV
V
OL
Output LOW Voltage (Note 2) 1830 1695 1555 1810 1705 1620 1810 1705 1620 mV
V
IH
Input HIGH Voltage (Single-Ended) 1165 880 1165 880 1165 880 mV
V
IL
Input LOW Voltage (Single-Ended) 1810 1475 1810 1475 1810 1475 mV
V
BB
Output Voltage Reference 1.38 1.26 1.38 1.26 1.38 1.26 V
V
IHCMR
Input HIGH Voltage Common Mode
Range (Differential) (Note 3)
1.65 0.55 1.65 0.55 1.65 0.55 V
I
IH
Input HIGH Current 150 150 150
mA
I
IL
Input LOW Current 0.5 0.5 0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary ±0.3 V.
2. Outputs are terminated through a 50 W resistor to V
CC
2.0 V.
3. V
IHCMR
min varies 1:1 with V
EE
, max varies 1:1 with V
CC
. The V
IHCMR
range is referenced to the most positive side of the differential input signal.
Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between V
PP
Min
and 1.0 V.
MC100LVEL38
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5
Table 6. AC CHARACTERISTICS (V
CC
= 3.3 V; V
EE
= 0.0 V or V
CC
= 0.0 V; V
EE
= 3.3 V (Note 1))
Symbol
Characteristic
40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
fmax Maximum Toggle Frequency (Figure 4)
Divide by 2
Divide by 4, Divide by 6
1.0
0.8
1.2
0.82
1.0
0.8
1.2
0.82
1.0
0.8
1.2
0.82
GHz
t
PLH
t
PHL
Propagation Delay to Output
CLK to Q (Differential)
CLK to Q (Single-Ended)
CLK to Phase_Out (Differential)
CLK to Phase_Out (Single-Ended)
MR to.Q
810
710
800
750
510
1010
1010
1000
1050
810
850
750
840
790
540
1050
1050
1040
1090
840
900
800
890
840
570
1100
1100
1090
1140
870
ps
t
SKEW
Within-Device Skew (Note 2)
Q
0
Q
3
All
50
75
50
75
50
75
ps
Part-to-Part
Q
0
Q
3
(Differential)
All
200
240
200
240
200
240
t
S
Setup Time
EN
to CLK
DIVSEL to CLK
150 150 150 ps
t
H
Hold Time
CLK
to EN
CLK to Div_Sel
150
200
150
200
150
200
ps
V
PP
Input Swing (Note 3)
CLK
250 1000 250 1000 250 1000 mV
t
RR
Reset Recovery Time 100 100 100 ps
t
PW
Minimum Pulse Width
CLK
MR
800
700
800
700
800
700
ps
t
r
, t
f
Output Rise/Fall Times Q (20% 80%) 280 550 280 550 280 550 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. V
EE
can vary ±0.3 V.
2. Skew is measured between outputs under identical transitions.
3. V
PP
(min) is minimum input swing for which AC parameters are guaranteed. The device will function reliably with differential inputs down
to 100 mV.
Figure 4. Fmax: Voutpp vs Input Frequency per DIV2/4/6
MC100LVEL38
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6
Figure 5. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D
Termination of ECL Logic Devices.)
Driver
Device
Receiver
Device
QD
Q D
Z
o
= 50 W
Z
o
= 50 W
50 W 50 W
V
TT
V
TT
= V
CC
2.0 V
ORDERING INFORMATION
Device Package Shipping
MC100LVEL38DWG SOIC20 WB
(Pb-Free)
38 Units / Tube
MC100LVEL38DWR2G SOIC20 WB
(Pb-Free)
1000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D
.
Resource Reference of Application Notes
AN1405/D ECL Clock Distribution Techniques
AN1406/D Designing with PECL (ECL at +5.0 V)
AN1503/D ECLinPS I/O SPiCE Modeling Kit
AN1504/D Metastability and the ECLinPS Family
AN1568/D Interfacing Between LVDS and ECL
AN1672/D The ECL Translator Guide
AND8001/D Odd Number Counters Design
AND8002/D Marking and Date Codes
AND8020/D Termination of ECL Logic Devices
AND8066/D Interfacing with ECLinPS
AND8090/D AC Characteristics of ECL Devices

MC100LVEL38DWG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Clock Generators & Support Products 3.3V ECL Clock Generator
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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