MC74LVX157MEL

MC74LVX157
http://onsemi.com
4
AC ELECTRICAL CHARACTERISTICS (Input t
r
= t
f
= 3.0ns)
T
A
= 25°C T
A
= − 40 to 85°C
Symbol Parameter Test Conditions
Min Typ Max Min Max
Unit
t
PLH
,
t
PHL
Propagation Delay, Input to
Output
V
CC
= 2.7V C
L
= 15pF
C
L
= 50pF
6.6
9.1
12.5
16.0
1.0
1.0
15.5
19.0
ns
V
CC
= 3.3 ± 0.3V C
L
= 15pF
C
L
= 50pF
5.1
7.6
7.9
11.4
1.0
1.0
9.5
13.0
t
PLH
,
t
PHL
Propagation Delay, S to Zn
V
CC
= 2.7V C
L
= 15pF
C
L
= 50pF
8.9
11.4
16.9
20.4
1.0
1.0
20.5
24.0
ns
V
CC
= 3.3 ± 0.3V C
L
= 15pF
C
L
= 50pF
7.0
9.5
11.0
14.5
1.0
1.0
13.0
16.5
t
PLH
,
t
PHL
Propagation Delay, E to Zn
V
CC
= 2.7V C
L
= 15pF
C
L
= 50pF
9.1
11.6
17.6
21.1
1.0
1.0
20.5
24.0
ns
V
CC
= 3.3 ± 0.3V C
L
= 15pF
C
L
= 50pF
7.2
9.7
11.5
15.0
1.0
1.0
13.5
17.0
t
OSHL
t
OSLH
Output−to−Output Skew (Note 1) V
CC
= 2.7V C
L
= 50pF
V
CC
= 3.3 ±0.3V C
L
= 50pF
1.5
1.5
1.5
1.5
ns
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (t
OSHL
) or LOW−to−HIGH (t
OSLH
); parameter
guaranteed by design.
CAPACITIVE CHARACTERISTICS
T
A
= 25°C T
A
= − 40 to 85°C
Symbol Parameter
Min Typ Max Min Max
Unit
Cin Input Capacitance 4 10 10 pF
C
PD
Power Dissipation Capacitance (Note 2) 20 pF
2. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
CC(OPR
)
= C
PD
V
CC
f
in
+ I
CC
/4 (per bit). C
PD
is used to determine the no−load
dynamic power consumption; P
D
= C
PD
V
CC
2
f
in
+ I
CC
V
CC
.
NOISE CHARACTERISTICS (Input t
r
= t
f
= 3.0ns, C
L
= 50pF, V
CC
= 3.3V, Measured in SOIC Package)
T
A
= 25°C
Symbol Characteristic
Typ Max
Unit
V
OLP
Quiet Output Maximum Dynamic V
OL
0.3 0.5 V
V
OLV
Quiet Output Minimum Dynamic V
OL
−0.3 −0.5 V
V
IHD
Minimum High Level Dynamic Input Voltage 2.0 V
V
ILD
Maximum Low Level Dynamic Input Voltage 0.8 V
In or S
E
t
PLH
t
PHL
V
CC
GND
50%
50% V
CC
Zn
V
CC
GND
Zn
t
PHL
t
PLH
50%
50% V
CC
*Includes all probe and jig capacitance
C
L
*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
Figure 3.
Figure 4.
Figure 5. Propagation Delay Test Circuit
MC74LVX157
http://onsemi.com
5
PACKAGE DIMENSIONS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
18
16 9
SEATING
PLANE
F
J
M
R
X 45
G
8 PLP
−B−
−A−
M
0.25 (0.010) B
S
−T−
D
K
C
16 PL
S
B
M
0.25 (0.010) A
S
T
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A 9.80 10.00 0.386 0.393
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
F 0.40 1.25 0.016 0.049
G 1.27 BSC 0.050 BSC
J 0.19 0.25 0.008 0.009
K 0.10 0.25 0.004 0.009
M 0 7 0 7
P 5.80 6.20 0.229 0.244
R 0.25 0.50 0.010 0.019

SOIC−16
D SUFFIX
CASE 751B−05
ISSUE J
TSSOP−16
DT SUFFIX
CASE 948F−01
ISSUE A
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A 4.90 5.10 0.193 0.200
B 4.30 4.50 0.169 0.177
C −−− 1.20 −−− 0.047
D 0.05 0.15 0.002 0.006
F 0.50 0.75 0.020 0.030
G 0.65 BSC 0.026 BSC
H 0.18 0.28 0.007 0.011
J 0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K 0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L 6.40 BSC 0.252 BSC
M 0 8 0 8
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.

SECTION N−N
SEATING
PLANE
IDENT.
PIN 1
1
8
16
9
DETAIL E
J
J1
B
C
D
A
K
K1
H
G
DETAIL E
F
M
L
2X L/2
−U−
S
U0.15 (0.006) T
S
U0.15 (0.006) T
S
U
M
0.10 (0.004) V
S
T
0.10 (0.004)
−T−
−V−
−W−
0.25 (0.010)
16X REFK
N
N
MC74LVX157
http://onsemi.com
6
H
E
A
1
DIM MIN MAX MIN MAX
INCHES
−−− 2.05 −−− 0.081
MILLIMETERS
0.05 0.20 0.002 0.008
0.35 0.50 0.014 0.020
0.18 0.27 0.007 0.011
9.90 10.50 0.390 0.413
5.10 5.45 0.201 0.215
1.27 BSC 0.050 BSC
7.40 8.20 0.291 0.323
0.50 0.85 0.020 0.033
1.10 1.50 0.043 0.059
0
0.70 0.90 0.028 0.035
−−− 0.78 −−− 0.031
A
1
H
E
Q
1
L
E
10
0
10
L
E
Q
1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS AND ARE MEASURED
AT THE PARTING LINE. MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)
PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT
INCLUDE DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08 (0.003)
TOTAL IN EXCESS OF THE LEAD WIDTH
DIMENSION AT MAXIMUM MATERIAL CONDITION.
DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OR THE FOOT. MINIMUM SPACE
BETWEEN PROTRUSIONS AND ADJACENT LEAD
TO BE 0.46 ( 0.018).
M
L
DETAIL P
VIEW P
c
A
b
e
M
0.13 (0.005)
0.10 (0.004)
1
16 9
8
D
Z
E
A
b
c
D
E
e
L
M
Z
SOEIAJ−16
M SUFFIX
CASE 966−01
ISSUE O
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MC74LVX157/D
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MC74LVX157MEL

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Encoders, Decoders, Multiplexers & Demultiplexers 2-3.6V Quad
Lifecycle:
New from this manufacturer.
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