MAX1830/MAX1831
3A, 1MHz, Low-Voltage, Step-Down Regulators with
Synchronous Rectification and Internal Switches
_______________________________________________________________________________________ 7
lation comparator turns the PMOS switch on at the end
of each off-time, keeping the device in continuous-con-
duction mode. The PMOS switch remains on until the
output is in regulation or the current limit is reached.
When the PMOS switch turns off, it remains off for the
programmed off-time (t
OFF
). To control the current
under short-circuit conditions, the PMOS switch
remains off for approximately 4 x t
OFF
when V
OUT
<
V
OUT(NOM)
/ 4.
Idle Mode
Under light loads, the devices improve efficiency by
switching to a pulse-skipping Idle Mode. Idle Mode
operation occurs when the current through the PMOS
switch is less than the Idle Mode threshold current. Idle
Mode forces the PMOS to remain on until the current
through the switch reaches the Idle Mode threshold,
thus minimizing the unnecessary switching that
degrades efficiency under light loads. In Idle Mode, the
V
CC
470pF
2.2µF
1µF
10
FBSEL
FEEDBACK
SELECTION
CURRENT
SENSE
PWM LOGIC
AND
DRIVERS
IN
FB
V
IN
3.0V TO 5.5V
V
OUT
LX
C
IN
CERAMIC
PGNDTOFF
R
TOFF
GND
NOTE: HEAVY LINES DENOTE HIGH-CURRENT PATHS.
REF
REF
SUMMING
COMPARATOR
REF
REF
COMP
SKIP
SHDN
TIMER
V
IN
CURRENT
SENSE
DIGITAL
SOFT-START
MAX1830
MAX1831
G
m
C
OUT
Figure 2. Functional Diagram
TOFF
COMP
V
CC
FBSEL
SHDN
IN
PGND
GND
REF
MAX1830
LX
FB
MAX1830
MAX1831
R
TOFF
1µF
L
1.5µF
2.2µF
470pF
10
INPUT
OUTPUT
V
OUT
= 2.5V, FBSEL = V
CC
V
OUT
= 1.8V, FBSEL = REF
V
OUT
= 1.5V, FBSEL = FLOATING
MAX1831
V
OUT
= 2.5V, FBSEL = V
CC
V
OUT
= 3.3V, FBSEL = REF
V
OUT
= 1.5V, FBSEL = FLOATING
SUMIDA
CDRH-6D28
C
OUT
120µF, 4V
Panasonic SP
C
IN
22µF,
6.3V X5R
Figure 1. Typical Circuit
MAX1830/MAX1831
3A, 1MHz, Low-Voltage, Step-Down Regulators with
Synchronous Rectification and Internal Switches
8 _______________________________________________________________________________________
device operates in discontinuous conduction. Current-
sense circuitry monitors the current through the NMOS
synchronous switch, turning it off before the current
reverses. This prevents current from being pulled from
the output filter through the inductor and NMOS switch to
ground. As the device switches between operating
modes, no major shift in circuit behavior occurs.
100% Duty-Cycle Operation
When the input voltage drops near the output voltage,
the duty cycle increases until the PMOS MOSFET is on
continuously. The dropout voltage in 100% duty cycle
is the output current multiplied by the on-resistance of
the internal PMOS switch and parasitic resistance in the
inductor. The PMOS switch remains on continuously as
long as the current limit is not reached.
Internal Digital Soft-Start Circuit
Soft-start allows a gradual increase of the current-limit
level at startup to reduce input-surge currents. The
MAX1830/MAX1831 contain internal digital soft-start cir-
cuits, controlled by a counter, a digital-to-analog con-
verter (DAC), and the current-limit comparator. At
power-on or in shutdown mode, the soft-start counter is
reset to zero. When the MAX1830/MAX1831 are enabled
or powered up, its counter starts counting LX switching
cycles, and the DAC begins incrementing the compari-
son voltage applied to the current-limit comparator. The
DAC ramps up the internal current limit in four 25%
steps, as the count increases to 256 cycles. As a result,
the main output capacitor charges up relatively slowly.
The exact time of the output rise depends on nominal
switching frequency, output capacitance, and the load
current, and is typically 1ms.
Shutdown
Drive SHDN to a logic-level low to place the
MAX1830/MAX1831 in low-power shutdown mode and
reduce supply current to less than 1µA. In shutdown, all
circuitry and internal MOSFETs turn off, and the LX
node becomes high impedance. Drive SHDN to a
logic-level high or connect to V
CC
for normal operation.
Summing Comparator
Three signals are added together at the input of the
summing comparator (Figure 2): an output-voltage error
signal relative to the reference voltage, an integrated
output-voltage error correction signal, and the sensed
PMOS switch current. The integrated error signal is pro-
vided by a transconductance amplifier with an external
capacitor at COMP. This integrator provides high DC
accuracy without the need for a high-gain amplifier.
Connecting a capacitor at COMP modifies the overall
loop response (see Integrator Amplifier).
Table 1. Recommended Component Values (I
OUT
= 3.0A)
0
400
200
800
600
1200
1000
1400
2.6 3.6 4.13.1 4.6 5.1 5.6
MAXIMUM RECOMMENDED
OPERATING FREQUENCY vs. INPUT VOLTAGE
MAX1830/MAX1831
V
IN
(V)
OPERATING FREQUENCY (kHz)
V
OUT
= 1.5V
V
OUT
= 1.8V
V
OUT
= 2.5V
V
OUT
= 3.3V
Figure 3. Maximum Recommended Operating Frequency vs.
Input Voltage
V
IN
(V) V
OUT
(V) f
PWM
(kHz) L (µH) R
TOFF
(k)
5 3.3 800 2.2 39
5 2.5 865 2.2 56
5 1.8 850 2.2 75
5 1.5 860 2.2 82
5 1.1 625 2.2 130
3.3 2.5 570 1.5 39
3.3 1.8 850 1.5 51
3.3 1.5 860 1.5 62
3.3 1.1 680 1.5 100
MAX1830/MAX1831
3A, 1MHz, Low-Voltage, Step-Down Regulators with
Synchronous Rectification and Internal Switches
_______________________________________________________________________________________ 9
Synchronous Rectification
In a step-down regulator without synchronous rectifica-
tion, an external Schottky diode provides a path for cur-
rent to flow when the inductor is discharging. Replacing
the Schottky diode with a low-resistance NMOS syn-
chronous switch reduces conduction losses and
improves efficiency.
The NMOS synchronous-rectifier switch turns on follow-
ing a short delay after the PMOS power switch turns off,
thus preventing cross conduction or shoot through. In
constant-off-time mode, the synchronous-rectifier
switch turns off just prior to the PMOS power switch
turning on. While both switches are off, inductor current
flows through the internal-body diode of the NMOS
switch. The internal-body diodes forward voltage is rel-
atively high. An external Schottky diode from PGND to
LX can improve efficiency.
Thermal Resistance
Junction-to-ambient thermal resistance, θ
JA
, is highly
dependent on the amount of copper area immediately
surrounding the IC leads. The MAX1830/MAX1831
evaluation kit has 0.7in
2
of copper area and a thermal
resistance of +71°C/W with no forced airflow. Airflow
over the board significantly reduces the junction-to-
ambient thermal resistance. For heatsinking purposes,
evenly distribute the copper area connected at the IC
among the high-current pins.
Power Dissipation
Power dissipation in the MAX1830/MAX1831 is domi-
nated by conduction losses in the two internal power
switches. Power dissipation due to supply current in the
control section and average current used to charge
and discharge the gate capacitance of the internal
switches (i.e., switching losses) is approximately:
P
DS
= C x V
IN
2
x f
PWM
where C = 5nF and f
PWM
is the switching frequen-
cy in PWM mode.
This number is reduced when the switching frequency
decreases as the part enters Idle Mode. Combined con-
duction losses in the two power switches are approxi-
mated by:
P
D
= I
OUT
2
x R
PMOS
where R
PMOS
is the on-resistance of the PMOS switch.
The junction-to-ambient thermal resistance required to
dissipate this amount of power is calculated by:
θ
JA
= (T
J,MAX
- T
A,MAX
) / P
D(T
OT
)
where:
θ
JA
= junction-to-ambient thermal resistance
T
J,MAX
= maximum junction temperature
T
A,MAX
= maximum ambient temperature
P
D(TOT)
= total losses
Design Procedure
For typical applications, use the recommended compo-
nent values in Table 1. For other applications, take the
following steps:
1) Select the desired PWM-mode switching frequency;
1MHz is a good starting point. See Figure 3 for maxi-
mum operating frequency.
2) Select the constant off-time as a function of input
voltage, output voltage, and switching frequency.
3) Select R
TOFF
as a function of off-time.
4) Select the inductor as a function of output voltage,
off-time, and peak-to-peak inductor current.
Setting the Output Voltage
The output of the MAX1830/MAX1831 is selectable
between one of three preset output voltages. For a pre-
set output voltage, connect FB to the output voltage
and connect FBSEL as indicated in Table 2. For an
adjustable output voltage, connect FBSEL to GND and
connect FB to a resistive divider between the output
Figure 4. Adjustable Output Voltage
Table 2. Output Voltage Programming
LX
R2
R1
R1 = 30k
R2 = R1(V
OUT
/ V
REF
- 1)
V
REF
= 1.1V
FB
V
OUT
MAX1830
MAX1831
PIN OUTPUT VOLTAGE (V)
FBSEL FB MAX1830 MAX1831
V
CC
Output voltage 2.5 2.5
Unconnected Output voltage 1.5 1.5
REF Output voltage 1.8 3.3
GND Resistive divider Adjustable

MAX1831EEE+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Switching Voltage Regulators 3A 1MHz Step-Down
Lifecycle:
New from this manufacturer.
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