EDB4064B3PD
Data Sheet E1830E30 (Ver. 3.0)
5
Pin Descriptions
[DDR2 Mobile RAM_a]
[DDR2 Mobile RAM_b]
[Common]
Notes: 1. Not internally connected.
2. Don’t connect. Internally connected.
Pin name Function
CK_a, /CK_a Clock
CKE_a Clock enable
/CS_a Chip select
CA0_a to CA9_a DDR command/address inputs
(Address configurations: Row:R0-R13,
Column:C0-C8,
Bank:BA0-BA2)
DM0_a to DM3_a Input data mask
DQ0_a to DQ31_a Data input/output
DQS0_a to DQS3_a, /DQS0_a to /DQS3_a Data strobe
VDDQ_a I/O power supply
VREFCA_a Reference voltage for CA input receiver
VREFDQ_a Reference voltage for DQ input receiver
ZQ_a Reference pin for output drive strength calibration
Pin name Function
CK_b, /CK_b Clock
CKE_b Clock enable
/CS_b Chip select
CA0_b to CA9_b DDR command/address inputs
(Address configurations: Row:R0-R13,
Column:C0-C8,
Bank:BA0-BA2)
DM0_b to DM3_b Input data mask
DQ0_b to DQ31_b Data input/output
DQS0_b to DQS3_b, /DQS0_b to /DQS3_b Data strobe
VDDQ_b I/O power supply
VREFCA_b Reference voltage for CA input receiver
VREFDQ_b Reference voltage for DQ input receiver
ZQ_b Reference pin for output drive strength calibration
Pin name Function
VDD1_a/b Core Power Supply 1 for a and b channels
VDD2_a/b Core Power Supply 2 for a and b channels and input receiver power supply
VSS_a/b Ground for a and b channels
NC
*1
No connection
NU
*2
Not usable
