MAX6457–MAX6460
High-Voltage, Low-Current Voltage Monitors in
SOT Packages
7
Maxim Integrated
MAX6458
V
CC
IN+
IN-
GND
OUT
1.228V
UV
OV
HYSTERESIS
OPTION
TIMEOUT
OPTION
"UV": UNDERVOLTAGE
"OV": OVERVOLTAGE
MAX6457
HYSTERESIS
OPTION
TIMEOUT
OPTION
LATCH
V
CC
IN+
GND
OUT
1.228V
CLEAR
MAX6459
V
CC
IN+
IN-
GND
1.228V
UV
OV
HYSTERESIS
OPTION
"UV": UNDERVOLTAGE
"OV": OVERVOLTAGE
OUTA
OUTB
MAX6460
V
CC
IN+
IN-
REF
GND
2.25V
OUT
Functional Diagrams
Figure 1. MAX6457 Functional Diagram
Figure 2. MAX6458 Functional Diagram
Figure 3. MAX6459 Functional Diagram Figure 4. MAX6460 Functional Diagram
MAX6457–MAX6460
High-Voltage, Low-Current Voltage Monitors in
SOT Packages
8
Maxim Integrated
Detailed Description
Each of the MAX6457–MAX6460 high-voltage (4V to
28V), low-power voltage monitors include a precision
bandgap reference, one or two low-offset-voltage com-
parators, internal threshold hysteresis, internal timeout
period, and one or two high-voltage open-drain outputs.
Programming the Trip Voltage (V
TRIP
)
Two external resistors set the trip voltage, V
TRIP
(Figure 5).
V
TRIP
is the point at which the applied voltage (typically
V
CC
) toggles OUT. The MAX6457/MAX6458/MAX6459/
MAX6460’s high input impedance allows large-value
resistors without compromising trip-voltage accuracy.
To minimize current consumption, select a value for R2
between 10k and 1M, then calculate R1 as follows:
where V
TRIP
= desired trip voltage (in volts), V
TH
=
threshold trip voltage (V
TH
+ for overvoltage detection
or V
TH
- for undervoltage detection).
Use the MAX6460 voltage reference (REF) to set the
trip threshold by connecting IN+ or IN- through a volt-
age divider (within the inputs common-mode voltage
range) to REF. Do not connect REF directly to IN+ or
IN- since this violates the input common-mode voltage
range. Small leakage currents into the comparators
inputs allows use of large value resistors to prevent
loading the reference and affecting its accuracy. Figure
5b shows an active-high power-good output. Use the
following equation to determine the resistor values
when connecting REF to IN-:
where V
REF
= reference output voltage (2.25V, typ),
V
REFD
= divided reference, V
TRIP
= desired trip thresh-
old in (in volts).
For an active-low power-good output, connect the
resistor divider R1 and R2 to the inverting input and the
reference-divider network to the noninverting input.
Alternatively, connect an external reference less than
1.4V to either input.
RR
V
V
TRIP
REFD
12 1=−
VV
R
RR
REFD REF
=
+
4
34
RR
V
V
TRIP
TH
12 1=
-
V
CC
IN+
GND
OUT
(OUTA FOR
MAX6459)
R1
V
CC
R2
R
PULLUP
OUT
(OUTA)
MAX6457–
MAX6460
V
TRIP
= V
TH
R1 + R2
R2
Figure 5a. Programming the Trip Voltage
V
CC
IN+
REF
IN-
GND
R1
V
TRIP
V
REFD
R2
R3
R4
R
PULLUP
OUTOUT
MAX6460
Figure 5b. Programming the MAX6460 Trip Voltage
V
TH+
V
TH-
V
IN+
V
OUT
0
V
CC
V
HYST
t
TP
t
TP
Figure 6. Input and Output Waveforms (Noninverting Input Varied)
MAX6457–MAX6460
High-Voltage, Low-Current Voltage Monitors in
SOT Packages
9
Maxim Integrated
Hysteresis
Hysteresis adds noise immunity to the voltage monitors
and prevents oscillation due to repeated triggering
when V
IN
is near the threshold trip voltage. The hystere-
sis in a comparator creates two trip points: one for the
rising input voltage (V
TH
+) and one for the falling input
voltage (V
TH
-). These thresholds are shown in Figure 6.
The internal hysteresis options of the MAX6457/
MAX6458/MAX6459 are designed to eliminate the need
for adding an external hysteresis circuit.
Timeout Period
The timeout period (t
TP
) for the MAX6457 is the time
from when the input (IN+) crosses the rising input
threshold (V
TH
+) to when the output goes high (see
Figures 6 and 7). For the MAX6458, the monitored volt-
age must be in the “window” before the timeout starts.
The MAX6459 and MAX6460 do not offer the extended
timeout option (150ms). The extended timeout period is
suitable for overvoltage protection applications requir-
ing transient immunity to avoid false output assertion
due to noise spikes.
Latched-Output Operation
The MAX6457 features a digital latch input (CLEAR) to
latch any overvoltage event. If the voltage on IN+ (V
IN
+)
is below the internal threshold (V
TH
-), or if V
CC
is below
4V, OUT remains low regardless of the state of CLEAR.
Drive CLEAR high to latch OUT high when V
IN
+ exceeds
V
TH
+. When CLEAR is high, OUT does not deassert if
V
IN
+ drops back below V
IN
-. Toggle CLEAR to deassert
OUT. Drive CLEAR low to make the latch transparent
(Figure 7). CLEAR must be low when powering up the
MAX6457. To initiate self-clear at power-up, add a 100k
pullup resistor from CLEAR to V
CC
and a 1µF capacitor
from CLEAR to GND to hold CLEAR low. Connect
CLEAR to GND when not used. See Figure 9.
IN+
OUT
>V
TH+
<V
TH-
V
CC
V
CC
0
0
t
TP
t
TP
t
TP
CLEAR
Figure 7. Timing Diagram (MAX6457)
5-CELL
Li+
BATTERY
STACK
BATTERY
CHARGER
DC-DC
CONVERTER
LOAD
R1
R2
R
PULLUP
IN OUT
+21V
V
CC
GND
IN+ OUT
(OUTA FOR
MAX6459)
MAX6457–
MAX6460
SHDN
Figure 8. Undervoltage Lockout Typical Application Circuit

MAX6458UKD0C+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Supervisory Circuits Single Low C/V Voltage Monitor
Lifecycle:
New from this manufacturer.
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