AD5541A
Rev. A | Page 6 of 20
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C, unless otherwise noted.
Table 5.
Parameter Rating
V
DD
to AGND −0.3 V to +6 V
V
LOGIC
to DGND −0.3 V to +6 V
Digital Input Voltage to DGND
−0.3 V to V
DD
/V
LOGIC
+
0.3 V
V
OUT
to AGND −0.3 V to V
DD
+ 0.3 V
AGND to DGND −0.3 V to +0.3 V
Input Current to Any Pin Except Supplies ±10 mA
Operating Temperature Range
Industrial (A, B Versions) −40°C to +125°C
Storage Temperature Range −65°C to +150°C
Maximum Junction Temperature (T
J
max) 150°C
Package Power Dissipation (T
J
max − T
A
)/θ
JA
Thermal Impedance, θ
JA
LFCSP (CP-10-9) 50°C/W
LFCSP (CP-8-11) 62°C/W
MSOP (RM-10) 135°C/W
Lead Temperature, Soldering
Peak Temperature
1
260°C
ESD
2
5 kV
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
1
As per JEDEC Standard 20.
2
Human body model (HBM) classification.
AD5541A
Rev. A | Page 7 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
V
DD
1
V
OUT
2
A
GND
3
REF
4
CS
5
V
LOGIC
10
DGND
9
LDAC
8
DIN
7
SCLK
6
AD5541A
TOP VIEW
(Not to Scale)
08516-031
Figure 4. AD5541A 10-Lead MSOP Pin Configuration
Table 6. AD5541A Pin Function Descriptions
Pin No. Mnemonic Description
1 V
DD
Analog Supply Voltage.
2 V
OUT
Analog Output Voltage from the DAC.
3 AGND Ground Reference Point for Analog Circuitry.
4 REF
Voltage Reference Input for the DAC. Connect to an external 2.5 V reference. The reference can range from
2 V to V
DD
.
5
CS
Logic Input Signal. The chip select signal is used to frame the serial data input.
6 SCLK
Clock Input. Data is clocked into the serial input register on the rising edge of SCLK. The duty cycle must be
between 40% and 60%.
7 DIN
Serial Data Input. This device accepts 16-bit words. Data is clocked into the serial input register on the rising edge
of SCLK.
8
LDAC
LDAC Input. When this input is taken low, the DAC register is simultaneously updated with the contents of the
serial register data.
9 DGND Digital Ground. Ground reference for digital circuitry.
10 V
LOGIC
Logic Power Supply.
AD5541A
Rev. A | Page 8 of 20
08516-004
NOTES
1. FOR INCREASED RELIABILI
T
Y OF THE SOLDER
JOINTS AND MAXIMUM THERMAL CAPABILITY,
IT IS RECOMMENDED THAT THE PAD BE SOLDERED
TO THE SUBSTRATE, GND.
3SCLK
4DIN
1REF
2CS
6V
OUT
5CLR
8GND
7V
DD
TOP VIEW
(Not to Scale)
AD5541A-1
Figure 5. AD5541A-1 8-Lead LFCSP Pin Configuration
08516-005
1V
DD
2V
OUT
3AGND
4REF
5
10 V
LOGIC
9DGND
8
7DIN
6SCLK
TOP VIEW
(Not to Scale)
AD5541A
CS
LDAC
NOTES
1. FOR INCREASED RELIABILI
Y OF THE SOLDER
JOINTS AND MAXIMUM THERMAL CAPABILITY,
IT IS RECOMMENDED THAT THE PAD BE SOLDERED
TO THE SUBSTRATE, GND.
Figure 6. AD5541A 10-Lead LFCSP Pin Configuration
Table 7. AD5541A-1 and AD5541A Pin Function Descriptions
Pin No.
8-Lead LFCSP 10-Lead LFCSP
Mnemonic Description
1 4 REF
Voltage Reference Input for the DAC. Connect to an external 2.5 V reference. The
reference can range from 2 V to V
DD
.
2 5
CS
Logic Input Signal. The chip select signal is used to frame the serial data input.
3 6 SCLK
Clock Input. Data is clocked into the serial input register on the rising edge of SCLK.
Duty cycle must be between 40% and 60%.
4 7 DIN
Serial Data Input. This device accepts 16-bit words. Data is clocked into the serial input
register on the rising edge of SCLK.
5 N/A
1
CLR
Asynchronous Clear Input. The CLR input is falling edge sensitive. When CLR is low, all
LDAC
pulses are ignored. When CLR is activated, the serial input register and the DAC
register are cleared to zero scale.
6 2 V
OUT
Analog Output Voltage from the DAC.
N/A
1
9 DGND Digital Ground. Ground reference for digital circuitry.
7 1 V
DD
Analog Supply Voltage.
8 N/A
1
GND Ground Reference Point for Both Analog and Digital Circuitry.
N/A
1
3 AGND Ground Reference Point for Analog Circuitry.
N/A
1
10 V
LOGIC
Logic Power Supply.
N/A
1
8
LDAC
LDAC Input. When this input is taken low, the DAC register is simultaneously updated
with the contents of the serial input register.
EPAD
Exposed Pad. For increased reliability of the solder joints and maximum thermal
capability, it is recommended that the pad be soldered to the substrate, GND.
1
N/A means not applicable.

AD5541AARMZ-REEL7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC 16b 2LSB 2.7-5.5V w/ LVlogic
Lifecycle:
New from this manufacturer.
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