NCV1124DR2G

NCV1124
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4
THEORY OF OPERATION
NORMAL OPERATION
Figure 2 shows one channel of the NCV1124 along with
the necessary external components. Both channels share the
IN
Adj
pin as the negative input to a comparator. A brief
description of the components is as follows:
V
RS
− Ideal sinusoidal, ground referenced, sensor output
amplitude usually increases with frequency, depending on
loading.
R
RS
− Source impedance of sensor.
R1/R
Adj
External resistors for current limiting and
biasing.
INP1/IN
Adj
− Internal current sources that determine trip
points via R1/R
Adj
.
COMP1 − Internal comparator with built−in hysteresis
set at 160 mV.
OUT1 − Output 0 V − 5.0 V square wave with the same
frequency as V
RS
.
By inspection, the voltage at the (+) and (−) terminals of
COMP1 with V
RS
= 0V are:
V
+
+ INP1(R1 ) R
RS
)
(1)
V
+ IN
Adj
R
Adj
(2)
As V
RS
begins to rise and fall, it will be superimposed on
the DC biased voltage at V
+
.
V
+
+ INP1(R1 ) R
RS
) ) V
RS
(3)
To get comparator COMP1 to trip, the following
condition is needed when crossing in the positive direction,
V
+
u V
) V
HYS
(4)
(V
HYS
is the built−in hysteresis set to 160 mV), or when
crossing in the negative direction,
V
+
t V
* V
HYS
(5)
Combining equations 2, 3, and 4, we get:
INP1(R1 ) R
RS
) ) V
RS
u IN
Adj
R
Adj
) V
HYS
(6)
therefore,
V
RS(+TRP)
t IN
Adj
R
Adj
* INP1(R1 ) R
RS
) ) V
HYS
(7)
It should be evident that tripping on the negative side is:
V
RS(−TRP)
t IN
Adj
R
Adj
* INP1(R1 ) R
RS
) * V
HYS
(8)
In normal mode,
INP1 + IN
Adj
(9)
We can now re−write equation (7) as:
V
RS(+TR)
u INP1(R
Adj
* R1 * R
RS
) ) V
HYS
(10)
By making
R
Adj
+ R1 ) R
RS
(11)
you can detect signals with as little amplitude as V
HYS
.
A design example is given in the applications section.
OPEN SENSOR PROTECTION
The NCV1124 has a DIAG pin that when pulled high (5.0
V), will increase the IN
Adj
current source by roughly 50%.
Equation (7) shows that a larger V
RS(+TRP)
voltage will be
needed to trip comparator COMP1. However, if no V
RS
signal is present, then we can use equations 1, 2, and 4
(equation 5 does not apply in this mode) to get:
INP1(R1 ) R
RS
) u INP1 K
I
R
Adj
) V
HYS
(12)
Since R
RS
is the only unknown variable we can solve for
R
RS
,
R
RS
+
INP1 K
I
R
Adj
) V
HYS
INP1
* R1
(13)
Equation (13) shows that if the output switches states
when entering the diag mode with V
RS
= 0, the sensor
impedance must be greater than the above calculated value.
This can be very useful in diagnosing intermittent sensor.
INPUT PROTECTION
As shown in Figure 2, an active clamp is provided on each
input to limit the voltage on the input pin and prevent
substrate current injection. The clamp is specified to handle
±12 mA. This puts an upper limit on the amplitude of the
sensor output. For example, if R1 = 20 k, then
V
RS(MAX)
+ 20 k 12 mA + 240 V
Therefore, the V
RS(pk−pk)
voltage can be as high as 480 V.
The NCV1124 will typically run at a frequency up to 1.8
MHz if the input signal does not activate the positive or
negative input clamps. Frequency performance will be
lower when the positive or negative clamps are active.
Typical performance will be up to a frequency of 680 kHz
with the clamps active.
NCV1124
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5
CIRCUIT DESCRIPTION
Figure 3 shows the part operating near the minimum input
thresholds. As the sin wave input threshold is increased, the
low side clamps become active (Figure 4). Increasing the
amplitude further (Figure 5), the high−side clamp becomes
active. These internal clamps allow for voltages up to250 V
and 250 V on the sensor side of the setup (with R1 = R2 =
22 k) (reference the diagram page 1).
Figure 6 shows the effect using the diagnostic (DIAG)
function has on the circuit. The input threshold (negative) is
switched from a threshold of −160 mV to +160 mV when
DIAG goes from a low to a high. There is no hysteresis when
DIAG is high.
Figure 3. Minimum Threshold Operation
IN1, 200 mV/div
OUT1, 2.0 V/div
20 ms/div
Figure 4. Low−Side Clamp
IN1, 5.0 V/divOUT1, 2.0 V/div
20 ms/div
Figure 5. Low− and High−Side Clamps
IN1, 5.0 V/divOUT1, 2.0 V/div
20 ms/div
Figure 6. Diagnostic Operation
DIAG
5.0 V/div
20 ms/div
IN1
1.0 V/div
OUT1
5.0 V/div
NCV1124
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6
APPLICATION INFORMATION
Referring to Figure 2, the following will be a design
example given these system requirements:
R
RS
+ 1.5 kW (u 12 kW is considered open)
V
RS(MAX)
+ 120 V
pk
V
RS(MIN)
+ 250 mV
pk
F
VRS
+ 10 kHz @ V
RS(MIN)
+ 40 V
pk−pk
1. Determine tradeoff between R1 value and power
rating. (use 1/2 watt package)
P
D
+
ǒ
120
2
Ǹ
Ǔ
2
R1
t 1ń2W
Set R1 = 15 k. (The clamp current will then be 120/15 k
= 8.0 mA, which is less than the 12 mA limit.)
2. Determine R
Adj
Set R
Adj
as close to R1 + R
RS
as possible.
Therefore, R
Adj
= 17 k.
3. Determine V
RS(+TRP)
using equation (7).
V
RS(+TRP)
+
11
m
A
17 k
*
11
m
A(15 k
)
1.5 k)
)
160 m
V
RS(+TRP)
+ 166 mV typical
(easily meets 250 mV minimum)
4. Calculate worst case V
RS(+TRP)
Examination of equation (7) and the spec reveals the worst
case trip voltage will occur when:
V
HYS
= 180 mV
IN
Adj
= 16 mA
INP1 = 15 mA
R1 = 14.25 k (5% low)
R
Adj
= 17.85 k (5% High)
V
RS(+)MAX
+ 16 mA(17.85 k)
* 15mA(14.25 k ) 1.5 k) ) 180 mV
+ 229 mV
which is still less than the 250 mV minimum amplitude of
the input.
5. Calculate C1 for low pass filtering
Since the sensor guarantees 40 V
pk−pk
@ 10 kHz, a low
pass filter using R1 and C1 can be used to eliminate high
frequency noise without affecting system performance.
Gain Reduction +
0.29 V
20 V
+ 0.0145 +*36.7 dB
Therefore, a cut−off frequency, f
C
, of 145 Hz could be
used.
C1 v
1
2pf
C
R1
v 0.07 mF
Set C1 = 0.047 mF.
6. Calculate the minimum R
RS
that will be indicated as
an open circuit. (DIAG = 5.0 V)
Rearranging equation (7) gives
R
RS
+
ƪ
V
HYS
) [INP1 K
I
R
Adj
]
* V
RS(+TRP)
ƫ
INP1
* R1
But, V
RS
= 0 during this test, so it drops out.
Using the following as worst case Low and High:
Worst Case Low (R
RS
) Worst Case High (R
RS
)
IN
Adj
23.6 mA = 15 mA × 1.57 10.7 mA = 7.0 mA × 1.53
R
Adj
16.15 k 17.85 k
V
HYS
135 mV 185 mV
INP1
16 mA 6.0 mA
R1 15.75 k 14.25 k
K
I
1.57 1.53
R
RS
+
135 mV ) 23.6 mA 16.15 k
16 mA
* 15.75 k
+ 16.5 k
Therefore,
R
RS(MIN)
+ 16.5 k (meets 12 k system spec)
and,
R
RS(MAX)
+
185 mV ) 10.7 mA 17.85 k
6.0mA
* 14.25 k
+ 48.4 k

NCV1124DR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Sensor Interface DUAL VARIABLE RELUCTANCE
Lifecycle:
New from this manufacturer.
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