Characteristics X02
4/11 Doc ID 7480 Rev 4
Figure 5. Relative variation of triggering,
holding and latching current versus
junction temperature
Figure 6. Relative variation of holding
current versus gate-cathode
resistance (typical values)
I,I,I[T] /
GT H L j
I ,I ,I [T =25°C]
GT H L j
0.00
0.25
0.50
0.75
1.00
1.25
1.50
-40 -20 0 20 40 60 80 100 120 140
I
GT
T (°C)
j
I
H
& I
R = 1k
L
GK
Ω
Typical values
I [R ] / I [ =1k ]
HGK H
ΩR
GK
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
1.E-02 1.E-01 1.E+00 1.E+01
Tj=25
R(k)
GK
Ω
Figure 7. Relative variation of dV/dt immunity
versus gate-cathode resistance
(typical values)
Figure 8. Relative variation of dV/dt immunity
versus gate-cathode capacitance
(typical values)
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
0.1
1.0
10.0
dV/dt[R ] / dV/dt[ =1k ]
GK
Ω
R
GK
T
j
= 125°C
V = 0.67 x V
D DRM
R(k)
GK
Ω
20
18
16
14
12
10
8
6
4
2
0
0
24
6810
12 14
16 18 20
22
C (nF)
GK
dV/dt[C ] / dV/dt[ =1k ]
GK
Ω
R
GK
T
V = 0.67 x V
= 125°C
R = 1k
D DRM
GK
j
Ω
Figure 9. Surge peak on-state current
versus number of cycles
Figure 10. Non repetitive surge peak on state
current for a sinusoidal pulse and
corresponding value of I
2
T
1 10 100 1000
0
5
10
15
20
25
I (A)
TSM
Number of cycles
Non repetitive
T initial=25°C
j
Repetitive
T =25°C
amb
t =10ms
p
One cycle
1.00 10.000.100.01
300
100
10
1
I (A), I t (A s)
TSM
22
T initial = 25°C
j
I t
2
I
TSM
t (ms)
p
dI/dt limitation
