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PCA9550D,118

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P26
PCA9550_5 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 05 — 13 October 2008 4 of 26
NXP Semiconductors
PCA9550
2-bit I
2
C-bus LED driver with programmable blink rates
6. Functional description
Refer to Figure 1 “Block diagram of PCA9550”.
6.1 Device address
Following a START condition, the bus master must output the address of the slave it is
accessing. The address of the PCA9550 is shown in Figure 5. To conserve power, no
internal pull-up resistor is incorporated on the hardware selectable address pin and it must
be pulled HIGH or LOW.
The last bit of the address byte defines the operation to be performed. When set to logic 1
a read is selected, while a logic 0 selects a write operation.
6.2 Control register
Following the successful acknowledgement of the slave address, the bus master will send
a byte to the PCA9550, which will be stored in the Control register.
The lowest 3 bits are used as a pointer to determine which register will be accessed.
If the Auto-Increment (AI) flag is set, the three low order bits of the Control register are
automatically incremented after a read or write. This allows the user to program the
registers sequentially. The contents of these bits will rollover to ‘000’ after the last register
is accessed.
When the Auto-Increment flag is set (AI = 1) and a read sequence is initiated, the
sequence must start by reading a register different from the input register
(B2 B1 B0 ≠ 000).
Only the 3 least significant bits are affected by the AI flag. Unused bits must be
programmed with zeroes.
Fig 5. PCA9550 slave address
002aad242
1 1 0 0 0 0 A0 R/W
fixed
slave address
hardware
selectable
Reset state: 00h
Fig 6. Control register
002aad243
0 0 0 AI 0 B2 B1 B0
register address
Auto-Increment flag
PCA9550_5 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 05 — 13 October 2008 5 of 26
NXP Semiconductors
PCA9550
2-bit I
2
C-bus LED driver with programmable blink rates
6.2.1 Control register definition
6.3 Register descriptions
6.3.1 INPUT - Input register
The INPUT register reflects the state of the device pins. Writes to this register will be
acknowledged but will have no effect.
Remark: The default value ‘X’ is determined by the externally applied logic level (normally
logic 1) when used for directly driving LED with pull-up to V
DD
.
6.3.2 PSC0 - Frequency Prescaler 0
PSC0 is used to program the period of the PWM output.
The period of BLINK0 = (PSC0 + 1) / 44.
6.3.3 PWM0 - Pulse Width Modulation 0
The PWM0 register determines the duty cycle of BLINK0. The outputs are LOW (LED off)
when the count is less than the value in PWM0 and HIGH when it is greater. If PWM0 is
programmed with 00h, then the PWM0 output is always LOW.
The duty cycle of BLINK0 = (256 − PWM0) / 256.
Table 4. Register summary
B2 B1 B0 Register name Access Description
0 0 0 INPUT read only input register
0 0 1 PSC0 read/write frequency prescaler 0
0 1 0 PWM0 read/write PWM register 0
0 1 1 PSC1 read/write frequency prescaler 1
1 0 0 PWM1 read/write PWM register 1
1 0 1 LS0 read/write LED selector
Table 5. INPUT - Input register description
Bit 7 6 5 4 3 2 1 0
Symbol not used LED1 LED0
Default 000000XX
Table 6. PSC0 - Frequency Prescaler 0 register description
Bit 7 6 5 4 3 2 1 0
Symbol PSC0[7] PSC0[6] PSC0[5] PSC0[4] PSC0[3] PSC0[2] PSC0[1] PSC0[0]
Default 11111111
Table 7. PWM0 - Pulse Width Modulation 0 register description
Bit 7 6 5 4 3 2 1 0
Symbol PWM0
[7]
PWM0
[6]
PWM0
[5]
PWM0
[4]
PWM0
[3]
PWM0
[2]
PWM0
[1]
PWM0
[0]
Default 10000000
PCA9550_5 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 05 — 13 October 2008 6 of 26
NXP Semiconductors
PCA9550
2-bit I
2
C-bus LED driver with programmable blink rates
6.3.4 PSC1 - Frequency Prescaler 1
PSC1 is used to program the period of the PWM output.
The period of BLINK1 = (PSC1 + 1) / 44.
6.3.5 PWM1 - Pulse Width Modulation 1
The PWM1 register determines the duty cycle of BLINK1. The outputs are LOW (LED off)
when the count is less than the value in PWM1 and HIGH when it is greater. If PWM1 is
programmed with 00h, then the PWM1 output is always LOW.
The duty cycle of BLINK1 = (256 − PWM1) / 256.
6.3.6 LS0 - LED selector
The LS0 LED select register determines the source of the LED data.
00 = output is set LOW (LED on)
01 = output is set high-impedance (LED off; default)
10 = output blinks at PWM0 rate
11 = output blinks at PWM1 rate
Table 8. PSC1 - Frequency Prescaler 1 register description
Bit 7 6 5 4 3 2 1 0
Symbol PSC1[7] PSC1[6] PSC1[5] PSC1[4] PSC1[3] PSC1[2] PSC1[1] PSC1[0]
Default 11111111
Table 9. PWM1 - Pulse Width Modulation 1 register description
Bit 7 6 5 4 3 2 1 0
Symbol PWM1
[7]
PWM1
[6]
PWM1
[5]
PWM1
[4]
PWM1
[3]
PWM1
[2]
PWM1
[1]
PWM1
[0]
Default 10000000
Table 10. LS0 - LED selector register description
Bit 7 6 5 4 3 2 1 0
Symbol LS0[7:4] LED1 LED0
Default 11110101
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P26

PCA9550D,118

Mfr. #:
Buy PCA9550D,118
Manufacturer:
NXP Semiconductors
Description:
LED Lighting Drivers 2-BIT I2C FM OD LED BLK RST
Lifecycle:
New from this manufacturer.
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