TS555
8/12
TYPICAL CHARACTERISTICS
Figure 1 : Supply Current (each timer) versus
Supply Voltage
APPLICATION INFORMATION
MONOSTABLE OPERATION
In the monostable mode,the timer operates like a
one-shot generator. Referring to figure 2, the ex-
ternal capacitor is initially held discharged by a
transistor inside the timer.
Figure 2 :
The circuit triggers on a negative-going input sig-
nal when the level reaches 1/3 V
CC
. Once trig-
gered, the circuit remains in this state until the set
time has elapsed, even if it is triggered again dur-
ing this interval. The duration of the output HIGH
state is given by t = 1.1 R x C.
It can be noticed that since the charge rate and the
threshold level of the comparator are both directly
proportional to the supply voltage, the timing inter-
val is independent of the supply. Applying a nega-
tive pulse simultaneously to the Reset terminal
(pin 4) and the Trigger terminal (pin 2) during the
timing cycle discharges the external capacitor and
causes the cycle to start over. The timing cycle
now starts on the positive edge of the reset pulse.
While the reset pulse is applied, the output is driv-
en to the LOW state.
When a negative trigger pulse is applied to pin 2,
the flip-flop is set, releasing the short circuit across
the external capacitor and driving the output
HIGH. The voltage across the capacitor increases
exponentially with the time constant τ = R x C.
When the voltage across the capacitor equals 2/3
V
CC
, the comparator resets the flip-flop which then
discharges the capacitor rapidly and drives the
output to its LOW state.
Figure 3 shows the actual waveforms generated in
this mode of operation.
When Reset is not used, it should be tied high to
avoid any possible or false triggering.
Figure 3 :
CC
SUPPLY VOLTAGE, V (V)
CC
SUPPLY CURRENT, I ( A)
µ
300
200
100
0 4 8 12 16
V
CC
Reset
Trigger
Out
3
2
4
8
7
6
5
1
TS555
R
C
Control Voltage
0.01 F
µ
CAPACITOR VOLTAGE = 2.0V/div
Ω
Ω
µ
t = 0.1 ms / div
INPUT = 2.0V/div
OUTPUT VOLTAGE = 5.0V/div
R = 9.1k , C = 0.01 F , R = 1.0k
L
