MAX5200–MAX5203
Low-Cost, Voltage-Output, 16-Bit DACs with
Internal Reference in µMAX
10 ______________________________________________________________________________________
Applications Information
Power-Supply and Bypassing
Considerations
Bypass the power supply with a 10µF capacitor in par-
allel with a 0.1µF capacitor to AGND. Minimize lead
lengths to reduce lead inductance. If noise becomes
an issue, use shielding and/or ferrite beads to increase
isolation.
Output Buffer
The MAX5200–MAX5203 include low-offset, low-noise
buffers enabling the output to source 15mA or sink
5mA. The output buffer operates at a slew rate of
0.6V/µs. With a 1/4 FS to 3/4 FS output transition, the
buffer output typically settles to 1 LSB in less than
25µs. The MAX5200–MAX5203 output buffers provide a
low 0.2 typical output impedance. The MAX5200–
MAX5203 buffer amplifiers typically produce
175nV/Hz noise at 10kHz.
t
CS0L
t
CSWL
t
CSWH
SHUTDOWN WAKE-UP
t
CS0L
t
CSWL
t
CSWH
SHUTDOWN WAKE-UP
SCLK
CS
A. WAKING UP USING A THIRD FALLING EDGE ON CS.
B. WAKING UP USING A TRANSITION ON SCLK.
SCLK
CS
Figure 4. Shutdown Timing
t
CL
t
CH
t
CSS
D14D15
t
DS
t
DH
D0
t
CSH
t
CS1
t
CS0
SCLK
CS
DIN
LDAC
t
CP
t
CSWH
t
LDACS
t
LDAC
Figure 3. 4-Wire Interface Timing Diagram
MAX5200–MAX5203
Low-Cost, Voltage-Output, 16-Bit DACs with
Internal Reference in µMAX
______________________________________________________________________________________ 11
Bipolar Configuration
The MAX5200–MAX5203 are designed for unipolar opera-
tion, but can be used in bipolar applications with an exter-
nal amplifier and resistors. Figure 5 shows the
MAX5200–MAX5203 configured for bipolar operation. The
op amp is set for unity gain. Table 1 lists the offset binary
code for this circuit. The output voltage range is ±V
REF
.
Layout Considerations
Digital and AC transient signals coupling to AGND can
create noise at the output. Connect AGND to the high-
est quality ground available. Use proper grounding
techniques, such as a multilayer board with a low-
inductance ground plane. Wire-wrapped boards and
sockets are not recommended. For optimum system
performance, use printed circuit (PC) boards with sep-
arate analog and digital ground planes. Connect the
two ground planes together at the low-impedance
power-supply source. Connect DGND and AGND pins
together at the IC. The best ground connection is
achieved by connecting the DAC’s DGND and AGND
together, and then connecting that point to the system
analog ground plane. If the DAC’s DGND is connected
to the system digital ground, digital noise can get
through the DAC’s analog portion.
Chip Information
TRANSISTOR COUNT: 8764
PROCESS: BiCMOS
CLR
AGND
V
DD
REF
DIN
SCLK
CS
DGND
BIPOLAR
OUT
(±V
REF
)
LDAC
OUT
MC68XXXX
10µF
0.1µF
PCS0
MOSI
SCLK
+5V
-5V
MAX5200–
MAX5203
MAX400
Figure 5. MAX5200–MAX5203 Typical Operating Circuit—Bipolar Output
DAC LATCH CONTENTS
MSB LSB
ANALOG OUTPUT, V
OUT
1111 1111 1111 1111 +V
REF
× (32,767 / 32,768)
1000 0000 0000 0001 +V
REF
× (1 / 32,768)
1000 0000 0000 0000 0V
0111 1111 1111 1111 -V
REF
× (1 / 32,768)
0000 0000 0000 0000 -V
REF
× (32,768 / 32,768)
Table 1. Bipolar Code Table
MAX5200–MAX5203
Low-Cost, Voltage-Output, 16-Bit DACs with
Internal Reference in µMAX
12 ______________________________________________________________________________________
Selector Guide
PART
INTEGRAL
NONLINEARITY
(LSB, MAX)
SUPPLY VOLTAGE
RANGE (V)
REFERENCE INPUT
RANGE (V)
POWER-ON-RESET
VALUE
MAX5200AEUB 20 4.75 to 5.25 2.5 Midscale
MAX5200ACUB 20 4.75 to 5.25 2.5 Midscale
MAX5200BEUB 40 4.75 to 5.25 2.5 Midscale
MAX5201AEUB 20 4.75 to 5.25 2.5 Zero
MAX5201ACUB 20 4.75 to 5.25 2.5 Zero
MAX5201BEUB 40 4.75 to 5.25 2.5 Zero
MAX5202AEUB 20 2.7 to 3.6 1.5 Midscale
MAX5202ACUB 20 2.7 to 3.6 1.5 Midscale
MAX5202BEUB 40 2.7 to 3.6 1.5 Midscale
MAX5203AEUB 20 2.7 to 3.6 1.5 Zero
MAX5203ACUB 20 2.7 to 3.6 1.5 Zero
MAX5203BEUB 40 2.7 to 3.6 1.5 Zero

MAX5201ACUB+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Digital to Analog Converters - DAC 16Bit DAC w/Int Reference
Lifecycle:
New from this manufacturer.
Delivery:
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