LT3470
14
3470fd
applicaTions inForMaTion
Hot-Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LT3470. However, these capacitors can
cause problems if the LT3470 is plugged into a live supply
(see Linear Technology Application Note 88 for a complete
discussion). The low loss ceramic capacitor combined with
stray inductance in series with the power source forms an
under damped tank circuit, and the voltage at the V
IN
pin
of the LT3470 can ring to twice the nominal input voltage,
possibly exceeding the LT3470’s rating and damaging the
part. If the input supply is poorly controlled or the user will
be plugging the LT3470 into an energized supply, the input
network should be designed to prevent this overshoot.
Figure 6 shows the waveforms that result when an LT3470
circuit is connected to a 24V supply through six feet of
24-gauge twisted pair. The first plot is the response with
a 2.2µF ceramic capacitor at the input. The input voltage
rings as high as 35V and the input current peaks at 20A.
One method of damping the tank circuit is to add another
capacitor with a series resistor to the circuit. In Figure 6b
an aluminum electrolytic capacitor has been added. This
capacitor’s high equivalent series resistance damps the
circuit and eliminates the voltage overshoot. The extra
capacitor improves low frequency ripple filtering and can
slightly improve the efficiency of the circuit, though it is
likely to be the largest component in the circuit. An alterna-
tive solution is shown in Figure 6c. A 1Ω resistor is added
in series with the input to eliminate the voltage overshoot
(it also reduces the peak input current). A 0.1µF capacitor
improves high frequency filtering. This solution is smaller
and less expensive than the electrolytic capacitor. For high
input voltages its impact on efficiency is minor, reducing
efficiency less than one half percent for a 5V output at full
load operating from 24V.
High Temperature Considerations
The die junction temperature of the LT3470 must be
lower than the maximum rating of 125°C (150°C for the
H-grade). This is generally not a concern unless the ambi-
ent temperature is above 85°C. For higher temperatures,
care should be taken in the layout of the circuit to ensure
good heat sinking of the LT3470. The maximum load
current should be derated as the ambient temperature
approaches the maximum junction rating. The die tem-
perature is calculated by multiplying the LT3470 power
dissipation by the thermal resistance from junction to
ambient. Power dissipation within the LT3470 can be
estimated by calculating the total power loss from an
efficiency measurement. Thermal resistance depends
on the layout of the circuit board and choice of package.
The DD package with the exposed pad has a thermal
resistance of approximately 80°C/W while the ThinSOT
is approximately 150°C/W. Finally, be aware that at high
ambient temperatures the internal Schottky diode will
have significant leakage current (see Typical Performance
Characteristics) increasing the quiescent current of the
LT3470 converter.
