CBT3306_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 4 April 2013 3 of 12
NXP Semiconductors
CBT3306-Q100
Dual bus switch
7. Limiting values
[1] Stresses beyond the listed limits may damage the device permanently. These ratings are stress ratings only and functional operation of
the device at or beyond the conditions indicated under Section 8.
is not implied. Exposure to absolute-maximum-rated conditions for
extended periods may affect device reliability.
[2] The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
8. Recommended operating conditions
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
T
amb
=
40
C to +85
C, unless otherwise specified.
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage 0.5 +7.0 V
V
I
input voltage
[2]
0.5 +7.0 V
I
O
output current - 128 mA
I
IK
input clamping current V
I/O
=0V 50 - mA
T
stg
storage temperature 65 +150 C
Table 5. Operating conditions
All unused control inputs of the device must be held at V
CC
or GND to ensure proper device operation.
Symbol Parameter Conditions Min Typ Max Unit
V
CC
supply voltage 4.5 - 5.5 V
V
IH
HIGH-level input voltage 2.0 - - V
V
IL
LOW-level input voltage - - 0.8 V
T
amb
ambient temperature operating in free air 40 - +85 C
CBT3306_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 4 April 2013 4 of 12
NXP Semiconductors
CBT3306-Q100
Dual bus switch
9. Static characteristics
[1] All typical values are at V
CC
=5V, T
amb
=25C.
[2] This is the increase in supply current for each input that is at the specified TTL voltage level rather than V
CC
or GND.
[3] Measured by the voltage drop between the nA and the nB terminals at the indicated current through the switch. ON resistance is
determined by the lowest voltage of the two (nA, nB) terminals.
10. Dynamic characteristics
[1] The propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified load capacitance,
when driven by an ideal voltage source (zero output impedance).
[2] t
pd
is the same as t
PLH
and t
PHL
.
t
en
is the same as t
PZL
and t
PZH
.
t
dis
is the same as t
PLZ
and t
PHZ
.
Table 6. Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions T
amb
= 40 C to +85 C Unit
Min Typ
[1]
Max
V
IK
input clamping voltage V
CC
=4.5V; I
I
= 18 mA - - 1.2 V
I
I
input leakage current V
CC
=5.5V; V
I
= GND or 5.5 V - - 1 A
I
CC
supply current V
CC
=5.5V; I
O
=0mA;
V
I
=V
CC
or GND
--3A
V
pass
pass voltage output HIGH; V
I
=V
CC
=5.0V;
I
O
= 100 A
3.6 3.9 4.2 V
I
CC
additional supply current per input pin; V
CC
=5.5V;
one input at 3.4 V, other inputs at
V
CC
or GND
[2]
--2.5mA
C
I
input capacitance control pin; V
I
=3V or 0V - 3.15 - pF
C
io(off)
off-state input/output
capacitance
port off; V
I
= 3 V or 0 V; nOE =V
CC
-6.45-pF
R
ON
ON resistance V
CC
=4.5V; V
I
=0V; I
I
=64mA
[3]
-3.45
V
CC
=4.5V; V
I
=0V; I
I
=30mA
[3]
-3.45
V
CC
=4.5V; V
I
=2.4V; I
I
=15mA
[3]
-6.815
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 6.
Symbol Parameter Conditions T
amb
= 40 C to +85 C Unit
Min Typ Max
t
pd
propagation delay nA, nB to nB, nA; see Figure 4
[1][2]
- - 0.25 ns
V
CC
= 5.0 V 0.5 V
t
en
enable time nOE to nA, nB; see Figure 5
[2]
1.0 - 5.0 ns
V
CC
= 5.0 V 0.5 V
t
dis
disable time nOE to nA, nB; see Figure 5
[2]
1.0 - 5.0 ns
V
CC
= 5.0 V 0.5 V
CBT3306_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 4 April 2013 5 of 12
NXP Semiconductors
CBT3306-Q100
Dual bus switch
11. Waveforms
Measurement points are given in Table 8.
Logic levels: V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 4. The data input (nA, nB) to output (nB, nA) propagation delay times
001aak305
t
PLH
t
PHL
V
M
V
M
nB, nA
output
nA, nB
input
V
I
GND
V
OH
V
OL
Measurement points are given in Table 8.
Logic levels: V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 5. Enable and disable times
001aak298
t
PLZ
t
PHZ
outputs
disabled
outputs
enabled
V
Y
V
X
outputs
enabled
output
LOW to OFF
OFF to LOW
output
HIGH to OFF
OFF to HIGH
nOE input
V
I
3.5 V
V
M
V
M
V
OL
V
OH
GND
GND
t
PZL
t
PZH
V
M
V
M
Table 8. Measurement points
Supply voltage Input Output
V
CC
V
I
V
M
V
M
V
X
V
Y
V
CC
= 5.0 V 0.5 V GND to 3.0 V 1.5 V 1.5 V V
OL
+ 0.3 V V
OH
0.3 V

CBT3306D-Q100J

Mfr. #:
Manufacturer:
Nexperia
Description:
Digital Bus Switch ICs Dual bus switch
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet