LT5512
10
5512fa
Table 3. IF Output Differential Impedance (Parallel Equivalent)
Frequency
(MHz)
Differential Output
Impedance
Differential S11
Mag Angle
10 396 II - j10k 0.766 0
70 394 II - j5445 0.775 –1.1
170 393 II - j2112 0.774 –2.8
240 392 II - j1507 0.773 –3.9
450 387 II - j798 0.772 –7.3
750 377 II - j478 0.768 –12.2
860 371 II - j416 0.766 –14.0
1000 363 II - j359 0.762 –16.2
1250 363 II - j295 0.764 –19.6
1500 346 II -j244 0.756 –23.6
1900 317 II - j192 0.743 –29.9
impedance and differential refl ection coeffi cient between
the LO
+
and LO
–
pins. This information can be used to
compute the value of the series matching inductor, L3.
Alternatively, Figure 8 shows measured LO input return
loss versus frequency for various values of L3. Reactive
LO port matching is used on the high-frequency evaluation
board (see Figure 2).
IF Output Port
The differential IF outputs, IF
+
and IF
–
, are internally con-
nected to the collectors of the mixer switching transistors
as shown in Figure 9. These outputs should be combined
externally through an RF balun or 180° hybrid to achieve
optimum performance. Both pins must be biased at the
supply voltage, which can be applied through matching
inductors (see Figure 2), or through the center-tap of an
output transformer (see Figure 1). These pins are protected
with ESD diodes; the diodes allow peak AC signal swing
up to 1.3V above V
CC
.
As shown in Table 3, the IF output differential impedance
is approximately 390Ω in parallel with 0.44pF. A simple
band-pass IF matching network suitable for wireless ap-
plications is shown in Figure 9. Here, L1, L2 and C3 set the
desired IF output frequency. The 390Ω differential output
can then be applied directly to a differential fi lter, or an
8:1 balun for impedance transformation down to 50Ω.
To achieve maximum linearity, C3 should be located as
APPLICATIO S I FOR ATIO
WUU
U
FREQUENCY (MHz)
RETURN LOSS (dB)
1573 F08
0
–5
–10
–15
–20
–25
–30
0
1000
2000
2500
500 1500
3000
3500
4000
4.7nH
5.6nH
6.8nH
8.2nH
10nH
Figure 8. Single-Ended LO Port Return Loss
vs Frequency for Various Values of L3
close as possible to the IF
+
/IF
–
pins. Even small amounts
of inductance in series with C3 (such as through a via)
can signifi cantly degrade IIP3. The value of C3 should be
reduced by the value of internal capacitance (see Table 3).
This matching network is simple and offers good selectivity
for narrow band IF applications.
For IF frequencies below 100MHz, the simplest IF matching
technique is an 8:1 transformer connected across the IF
pins as shown in Figure 1. DC bias to the IF
+
and IF
–
pins
is provided through the transformer’s center-tap. A small
value IF capacitor (C3) improves the LO-IF leakage and
attenuates the undesired image frequency. No inductors
are required.
11
10
400Ω
C3
L1
L2
V
CC
IF
+
IF
–
TO
DIFFERENTIAL
FILTER OR
BALUN
5512 F09
LT5512
Figure 9. IF Output Equivalent Circuit
with Band-Pass Matching Elements
