OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

AD7920AKSZ-REEL7

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24
AD7910/AD7920
Rev. C | Page 4 of 24
Parameter
1
A Grade
1, 2
Unit Test Conditions/Comments
Power Dissipation
6
Normal Mode (Operational) 15 mW max V
DD
= 5 V, f
SAMPLE
= 250 kSPS
4.2 mW max V
DD
= 3 V, f
SAMPLE
= 250 kSPS
Full Power-Down 5 W max V
DD
= 5 V
3 W max V
DD
= 3 V
1
Temperature range from −40°C to +85°C.
2
Operational from V
DD
= 2.0 V, with input high voltage (V
INH
) 1.8 V min.
3
See the Terminology section.
4
SC70 values guaranteed by characterization.
5
Guaranteed by characterization.
6
See the Power vs. Throughput Rate section.
AD7920
V
DD
= 2.35 V to 5.25 V, f
SCLK
= 5 MHz, f
SAMPLE
= 250 kSPS, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Table 2.
Parameter
1
A Grade
, 1 2
B Grade
1, 2
Unit Test Conditions/Comments
DYNAMIC PERFORMANCE f
IN
= 100 kHz sine wave
Signal-to-Noise + Distortion (SINAD)
3
70 70 dB min V
DD
= 2.35 V to 3.6 V, T
A
= 25°C
69 69 dB min V
DD
= 2.4 V to 3.6 V
71.5 71.5 dB typ V
DD
= 2.35 V to 3.6 V
69 69 dB min V
DD
= 4.75 V to 5.25 V, T
A
= 25°C
68 68 dB min V
DD
= 4.75 V to 5.25 V
Signal-to-Noise Ratio (SNR)
3
71 71 dB min V
DD
= 2.35 V to 3.6 V, T
A
= 25°C
70 70 dB min V
DD
= 2.4 V to 3.6 V
70 70 dB min V
DD
= 4.75 V to 5.25 V, T
A
= 25°C
69 69 dB min V
DD
= 4.75 V to 5.25 V
Total Harmonic Distortion (THD)
3
−80 −80 dB typ
Peak Harmonic or Spurious Noise (SFDR)
3
−82 −82 dB typ
Intermodulation Distortion (IMD)
3
Second-Order Terms −84 −84 dB typ fa = 100.73 kHz, fb = 90.72 kHz
Third-Order Terms −84 −84 dB typ fa = 100.73 kHz, fb = 90.72 kHz
Aperture Delay 10 10 ns typ
Aperture Jitter 30 30 ps typ
Full Power Bandwidth 13.5 13.5 MHz typ @ 3 dB
2 2 MHz typ @ 0.1 dB
DC ACCURACY B Grade
4
Resolution 12 12 Bits
Integral Nonlinearity
3
±1.5 LSB max
± 0.75 LSB typ
Differential Nonlinearity −0.9/+1.5 LSB max Guaranteed no missed codes to 12 bits
±0.75 LSB typ
Offset Error
3, 5
±1.5 LSB max
±1.5 ±0.2 LSB typ
Gain Error
3, 5
±1.5 LSB max
±1.5 ±0.5 LSB typ
Total Unadjusted Error (TUE)
3, 5
±2 LSB max
ANALOG INPUT
Input Voltage Ranges 0 to V
DD
0 to V
DD
V
DC Leakage Current ±0.5 ±0.5 A max
Input Capacitance 20 20 pF typ Track-and-hold in track, 6 pF typ when in hold
AD7910/AD7920
Rev. C | Page 5 of 24
Parameter
1
A Grade
, 1 2
B Grade
1, 2
Unit Test Conditions/Comments
LOGIC INPUTS
Input High Voltage, V
INH
2.4 2.4 V min
1.8 1.8 V min V
DD
= 2.35 V
Input Low Voltage, V
INL
0.8 0.8 V max V
DD
= 3.6 V to 5.25 V
0.4 0.4 V max V
DD
= 2.35 V to 3.6 V
Input Current, I
IN
, SCLK Pin ±0.5 ±0.5 A max Typically 10 nA, V
IN
= 0 V or V
DD
Input Current, I
IN
, CS Pin
±10 ±10 nA typ
Input Capacitance, C
IN
6
5 5 pF max
LOGIC OUTPUTS
Output High Voltage, V
OH
V
DD
− 0.2 V
DD
− 0.2 V min I
SOURCE
= 200 µA, V
DD
= 2.35 V to 5.25 V
Output Low Voltage, V
OL
0.4 0.4 V max I
SINK
= 200 µA
Floating-State Leakage Current ±1 ±1 A max
Floating-State Output Capacitance
6
5 5 pF max
Output Coding Straight (natural) binary
CONVERSION RATE
Conversion Time 3.2 3.2 s max 16 SCLK cycles with SCLK at 5 MHz
Track-and-Hold Acquisition Time
3
250 250 ns max
Throughput Rate 250 250 kSPS max See the Serial Interface section
POWER REQUIREMENTS
V
DD
2.35/5.25 2.35/5.25 V min/max
I
DD
Digital I/Ps = 0 V or V
DD
Normal Mode (Static) 2.5 2.5 mA typ V
DD
= 4.75 V to 5.25 V, SCLK on or off
1.2 1.2 mA typ V
DD
= 2.35 V to 3.6 V, SCLK on or off
Normal Mode (Operational) 3 3 mA max V
DD
= 4.75 V to 5.25 V, f
SAMPLE
= 250 kSPS
1.4 1.4 mA max V
DD
= 2.35 V to 3.6 V, f
SAMPLE
= 250 kSPS
Full Power-Down Mode 1 1 A max Typically 50 nA
Power Dissipation
7
Normal Mode (Operational) 15 15 mW max V
DD
= 5 V, f
SAMPLE
= 250 kSPS
4.2 4.2 mW max V
DD
= 3 V, f
SAMPLE
= 250 kSPS
Full Power-Down 5 5 W max V
DD
= 5 V
3 3 W max V
DD
= 3 V
1
Temperature range from −40°C to +85°C.
2
Operational from V
DD
= 2.0 V, with input low voltage (V
INL
) 0.35 V max.
3
See the Terminology section.
4
B Grade, maximum specifications apply as typical figures when V
DD
= 4.75 V to 5.25 V.
5
SC70 values guaranteed by characterization.
6
Guaranteed by characterization.
7
See the Power vs. Throughput Rate section.
AD7910/AD7920
Rev. C | Page 6 of 24
TIMING SPECIFICATIONS
V
DD
= 2.35 V to 5.25 V, T
A
= T
MIN
to T
MAX
, unless otherwise noted.
Table 3.
Parameter
1
AD7910/AD7920
Limit at T
MIN
, T
MAX
Unit Description
f
SCLK
2
10 kHz min
3
5 MHz max
t
CONVERT
14 × t
SCLK
AD7910
16 × t
SCLK
AD7920
t
QUIET
50 ns min
Minimum quiet time required between bus relinquish and start of next
conversion
t
1
10 ns min
Minimum
CS pulse width
t
2
10 ns min
CS to SCLK setup time
t
3
4
22 ns max
Delay from
CS until SDATA three-state disabled
t
4
40 ns max Data access time after SCLK falling edge
t
5
0.4 × t
SCLK
ns min SCLK low pulse width
t
6
0.4 × t
SCLK
ns min SCLK high pulse width
t
7
5, 6
SCLK to data valid hold time
10 ns min V
DD
≤ 3.3 V
9.5 ns min 3.3 V < V
DD
≤ 3.6 V
7 ns min V
DD
> 3.6 V
t
8
6, 7
36 ns max SCLK falling edge to SDATA three-state
See Note 7 ns min SCLK falling edge to SDATA three-state
t
POWER-UP
8
1 s max Power-up time from full power-down
1
Guaranteed by characterization. All input signals are specified with tr = tf = 5 ns (10% to 90% of V
DD
) and timed from a voltage level of 1.6 V.
2
Mark/Space ratio for the SCLK input is 40/60 to 60/40.
3
Minimum f
SCLK
at which specifications are guaranteed.
4
Measured with the load circuit of Figure 2 and defined as the time required for the output to cross 0.8 V or 1.8 V when V
DD
= 2.35 V and 0.8 V or 2.0 V for V
DD
> 2.35 V.
5
Measured with a 50 pF load capacitor.
6
t
8
is derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 2. The measured number is then extrapolated
back to remove the effects of charging or discharging the 50 pF capacitor. This means that the time, t
8
, shown in the Timing Specifications is the true bus relinquish
time of the part and is independent of the bus loading.
7
T
7
values apply to t
8
minimum values also.
8
See Power-Up Time section.
200μAI
OL
200μAI
OH
1.6V
TO OUTPUT
PIN
C
L
50pF
02976-002
Figure 2. Load Circuit for Digital Output Timing Specifications
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24

AD7920AKSZ-REEL7

Mfr. #:
Buy AD7920AKSZ-REEL7
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 250 kSPS, 12- Bit
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet