AD7910/AD7920
Rev. C | Page 22 of 24
APPLICATION HINTS
GROUNDING AND LAYOUT
The printed circuit board that houses the AD7910/AD7920
should be designed such that the analog and digital sections are
separated and confined to certain areas of the board. This
facilitates the use of ground planes that can be easily separated.
A minimum etch technique is generally best for ground planes
as it gives the best shielding. Digital and analog ground planes
should be joined at only one place. If the AD7910/AD7920 is in
a system where multiple devices require an AGND to DGND
connection then the connection should still be made at one
point only, a star ground point that should be established as
close to the AD7910/AD7920 as possible.
Avoid running digital lines under the device as these couple
noise onto the die. The analog ground plane should be allowed
to run under the AD7910/AD7920 to avoid noise coupling. The
power supply lines to the AD7910/AD7920 should use as large a
trace as possible to provide low impedance paths and reduce the
effects of glitches on the power supply line. Fast switching
signals like clocks should be shielded with digital ground to
avoid radiating noise to other sections of the board, and clock
signals should never be run near the analog inputs. Avoid
crossover of digital and analog signals. Traces on opposite sides
of the board should run at right angles to each other. This
reduces the effects of feedthrough through the board. A micro-
strip technique is by far the best but is not always possible with
a double-sided board. In this technique, the component side of
the board is dedicated to ground planes while signals are placed
on the solder side.
Good decoupling is also very important. The supply should be
decoupled with, for example, a 680 nF 0805 to GND. When
using the SC70 package in applications where the size of the
components is of concern, a 220 nF 0603 capacitor, for example,
could be used instead. However, in that case, the decoupling can
not be as effective and can result in an approximate SINAD
degradation of 0.3 dB. To achieve the best performance from
these decoupling components, the user should endeavor to keep
the distance between the decoupling capacitor and the V
DD
and
GND pins to a minimum with short track lengths connecting
the respective pins.
Figure 28 and Figure 29 show the
recommended positions of the decoupling capacitor for the
MSOP and SC70 packages, respectively.
As can be seen in
Figure 28, for the MSOP package, the
decoupling capacitor is placed as close as possible to the IC,
with short track lengths to V
DD
and GND pins. The decoupling
capacitor could also be placed on the underside of the PCB
directly underneath the IC, between the V
DD
and GND pins
attached by vias. This method would not be recommended on
PCBs above a standard 1.6 mm thickness. The best performance
is seen with the decoupling capacitor on the top of the PCB next
to the IC.
02976-028
Figure 28. Recommended Supply Decoupling Scheme for the
AD7910/AD7920 MSOP Package
Similarly, for the SC70 package, the decoupling capacitor should
be located as close as possible to the V
DD
and GND pins.
Because of its pinout, that is, V
DD
being next to GND, the
decoupling capacitor can be placed extremely close to the IC.
The decoupling capacitor could be placed on the underside of
the PCB directly under the V
DD
and GND pins, but, as before,
the best performance is seen with the decoupling capacitor on
the same side as the IC.
02976-029
Figure 29. Recommended Supply Decoupling Scheme for the
AD7910/AD7920 SC70 Package
EVALUATING PERFORMANCE
The evaluation board package includes a fully assembled and
tested evaluation board, documentation, and software for
controlling the board from the PC via the Eval-Board
Controller. To demonstrate/evaluate the ac and dc performance
of the AD7910/AD7920, the evaluation board controller can be
used in conjunction with the AD7910/AD7920CB evaluation
boards as well as many other Analog Devices’ evaluation boards
ending in the CB designator.
The software allows the user to perform ac (fast Fourier
transform) and dc (histogram of codes) tests on the
AD7910/AD7920. See the evaluation board technical note for
more information.
