1
®
ISL6531
Dual 5V Synchronous Buck Pulse-Width
Modulator (PWM) Controller for DDRAM
Memory V
DDQ
and V
TT
Termination
The ISL6531 provides complete control and protection for
dual DC-DC converters optimized for high-performance
DDRAM memory applications. It is designed to drive low
cost N-channel MOSFETs in synchronous-rectified buck
topology to efficiently generate 2.5V V
DDQ
for powering
DDRAM memory, V
REF
for DDRAM differential signalling,
and V
TT
for signal termination. The ISL6531 integrates all of
the control, output adjustment, monitoring and protection
functions into a single package.
The V
DDQ
output of the converter is maintained at 2.5V
through an integrated precision voltage reference. The V
REF
output is precisely regulated to 1/2 the memory power
supply, with a maximum tolerance of ±1% over temperature
and line voltage variations. V
TT
accurately tracks V
REF
.
During V2_SD sleep mode, the V
TT
output is maintained by
a low power window regulator.
The ISL6531 provides simple, single feedback loop, voltage-
mode control with fast transient response for the V
DDQ
regulator. The V
TT
regulator features internal compensation
that eases the design. It includes two phase-locked 300kHz
triangle-wave oscillators which are displaced 90
o
to minimize
interference between the two PWM regulators. The
regulators feature error amplifiers with a 15MHz gain-
bandwidth product and 6V/µs slew rate which enables high
converter bandwidth for fast transient performance. The
resulting PWM duty ratio ranges from 0% to 100%.
The ISL6531 protects against overcurrent conditions by
inhibiting PWM operation. The ISL6531 monitors the current
in the V
DDQ
regulator by using the r
DS(ON)
of the upper
MOSFET which eliminates the need for a current sensing
resistor.
Ordering Information
Features
Provides V
DDQ
, V
REF
, and V
TT
voltages for one- and two-
channel DDRAM memory systems
Excellent voltage regulation
-V
DDQ
= 2.5V ±2% over full operating range
-V
REF
= ±1% over full operating range
-V
TT
= V
REF
± 30mV
Supports ‘S3’ sleep mode
-V
TT
is held at via a low power window
regulator to minimize wake-up time
Fast transient response
- Full 0% to 100% duty ratio
Operates from +5V Input
•V
TT
regulator internally compensated
Overcurrent fault monitor on VDD
- Does not require extra current sensing element
- Uses MOSFET’s r
DS(ON)
Drives inexpensive N-Channel MOSFETs
Small converter size
- 300kHz fixed frequency oscillator
24 Lead, SOIC or 32 Lead, 5mm×5mm QFN
Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
•V
DDQ
, V
TT
, and VREF regulation for DDRAM memory
systems
- Main memory in AMD® Athlon™ and K8™, Pentium®
III, Pentium IV, Transmeta, PowerPC™, AlphaPC™, and
UltraSparc® based computer systems
High-power tracking DC-DC regulators
PART NUMBER
TEMP
RANGE(
o
C) PACKAGE PKG. DWG. #
ISL6531CB 0 to 70 24 Lead SOIC M24.3
ISL6531CBZ
(See Note)
0 to 70 24 Lead SOIC
(Pb-free)
M24.3
ISL6531CR 0 to 70 32 Lead 5x5 QFN L32.5x5
ISL6530/31EVAL1 Evaluation Board
Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb
and Pb-free soldering operations. Intersil Pb-free products are MSL classified
at Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
1
2
---
V
DDQ
1
2
---
V
DDQ
Data Sheet August 11, 2005 FN9053.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003, 2005. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
2
Pinouts
24 LEAD (SOIC)
TOP VIEW
32 LEAD 5X5 (QFN)
TOP VIEW
15
16
17
10
9
8
VREF_IN
PHASE2
SENSE2
N/C
VCC
GNDA
18
19
20
21
22
23
24
7
6
5
4
3
2
1
BOOT1
PHASE1
FB1
SENSE1
VREF
PGND1
PVCC1
OCSET/SD
V2_SD
PGOOD
N/C
LGATE1
COMP1
UGATE1
13
14
12
11
UGATE2
LGATE2
PGND2
BOOT2
BOOT1
BOOT1
UGATE1
UGATE1
PGND1
PGND1
LGATE1
PVCC1
PHASE2
BOOT2
BOOT2
UGATE2
PGND2
PGND2
LGATE2
VCC
PHASE 1
VREF
FB1
COMP1
SENSE1
VREF_IN
GNDA
GNDA
PVCC1
OCSET/SD
V2_SD
PGOOD
N/C
SENSE2
N/C
VCC
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
32 31 30 29 28 27 26 25
910111213141516
ISL6531
3
Block Diagram
OSCILLATOR
SOFT-
START
INHIBIT
PWM
COMPARATOR
ERROR
AMP
VCC
PWM
PGND1
VREF
FB1
COMP1
OVER-
CURRENT
GATE
CONTROL
LOGIC
BOOT1
UGATE1
PHASE1
40µA
+
-
+
-
+
-
LGATE1
OCSET/SD
PGOOD
+
-
POWER-ON
RESET (POR)
90
o
Phase
INHIBIT
PWM
COMPARATOR
ERROR
AMP
PWM
GND
GATE
CONTROL
LOGIC
BOOT2
UGATE2
PHASE2
+
-
+
-
LGATE2
0.8V
REFERENCE
V2_SD
WINDOW
REGULATOR
PVCC1
VREF_IN
SENSE1
Shift
PGND2
VCC
SENSE2
+
-
+
-
+
-
+
-
0.85
X
1.15
X
0.85
X
1.15
X
Z
f
Z
c
ISL6531

ISL6531CR

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
IC REG CTRLR INTEL 2OUT 32QFN
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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