74VHC393FT
1
CMOS Digital Integrated Circuits Silicon Monolithic
74VHC393FT
74VHC393FT
74VHC393FT
74VHC393FT
Start of commercial production
2014-12
1.
1.
1.
1. Functional Description
Functional Description
Functional Description
Functional Description
• Dual Binary Counter
2.
2.
2.
2. General
General
General
General
The 74VHC393FT is an advanced high speed CMOS 4-BIT BINARY COUNTER fabricated with silicon gate
C
2
MOS technology.
It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS
low power dissipation.
It contains two independent counter circuits in one package, so that counting or frequency division of eight binary
bits can be achieved with one IC.
This device changes state on the negative going transition of the CK pulse. The counter can be reset to "0" (QA
to QD = "L") by a high at the CLR input regardless of other inputs.
An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply
voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up.
This circuit prevents device destruction due to mismatched supply and input voltages.
3.
3.
3.
3. Features
Features
Features
Features
(1) AEC-Q100 (Rev. H) (Note 1)
(2) Wide operating temperature range: T
opr
= -40 to 125
(3) High speed: f
MAX
= 170 MHz (typ.) at V
CC
= 5.0 V
(4) Low power dissipation: I
CC
= 4.0 µA (max) at T
a
= 25
(5) High noise immunity: V
NIH
= V
NIL
= 28 % V
CC
(min)
(6) Power-down protection is provided on all inputs.
(7) Balanced propagation delays: t
PLH
≈ t
PHL
(8) Wide operating voltage range: V
CC(opr)
= 2.0 V to 5.5 V
(9) Low noise: V
OLP
= 0.8 V (max)
(10) Pin and function compatible with the 74 series (74AC/HC/AHC etc.) 393 type.
Note 1: This device is compliant with the reliability requirements of AEC-Q100. For details, contact your Toshiba sales
representative.
4.
4.
4.
4. Packaging
Packaging
Packaging
Packaging
2017-02-22
Rev.3.0
©2015 Toshiba Corporation