REVISION A 7/17/15
874003DI-02 DATA SHEET
11 PCI EXPRESS™ JITTER ATTENUATOR
POWER CONSIDERATIONS
This section provides information on power dissipation and junction temperature for the 874003DI-02.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the 874003DI-02 is the sum of the core power plus the analog power plus the power dissipated in the
load(s). The following is the power dissipation for V
DD
= 3.3V + 5% = 3.465V, which gives worst case results.
• Power (core)
MAX
= V
DD_MAX
* (I
DD_MAX
+ I
DDA_MAX
) = 3.465V * (80mA + 15mA) = 329.175mW
• Power (outputs)
MAX
= V
DDO_MAX
* I
DDO_MAX
= 3.465V * 75mA = 259.87mW
Total Power
_MAX
= 329.2mW + 259.9mW = 589.1mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature is 125°C.
The equation for Tj is as follows: Tj = θJA * Pd_total + TA
Tj = Junction Temperature
θ
JA = Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A
= Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
JA
must be used. Assuming a
moderate air fl ow of 200 linear feet per minute and a multi-layer board, the appropriate value is 66.6°C/W per Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.589W * 66.6°C/W = 124.2°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air fl ow, and the
type of board (single layer or multi-layer).
TABLE 6. THERMAL RESISTANCE θ
JA
FOR 20-LEAD TSSOP, FORCED CONVECTION
θ
JA
by Velocity (Linear Feet per Minute)
0 200 500
Single-Layer PCB, JEDEC Standard Test Boards 114.5°C/W 98.0°C/W 88.0°C/W
Multi-Layer PCB, JEDEC Standard Test Boards 73.2°C/W 66.6°C/W 63.5°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
