74FCT16543CTPVG

1
IDT74FCT16543AT/CT/ET
FAST CMOS 16-BIT LATCHED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
SEPTEMBER 2009INDUSTRIAL TEMPERATURE RANGE
FEATURES:
0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for ABT functions
Typical tSK(o) (Output Skew) < 250ps
Low input and output leakage
1µA (max.)
•VCC = 5V ±10%
High drive outputs (–32mA IOH, 64mA IOL)
Power off disable outputs permit “live insertion”
Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V,
TA = 25°C
Available in SSOP, TSSOP, and TVSOP packages
FUNCTIONAL BLOCK DIAGRAM
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
© 2009 Integrated Device Technology, Inc. DSC-5444/5
IDT74FCT16543AT/CT/ET
FAST CMOS
16-BIT LATCHED
TRANSCEIVER
DESCRIPTION:
The FCT16543T 16-bit latched transceivers are built using advanced
dual metal CMOS technology. These high-speed, low-power devices are
organized as two independent 8-bit D-type latched transceivers with
separate input and output control to permit independent control of data flow
in either direction. For example, the A-to-B Enable (xCEAB) must be low
in order to enter data from the A port or to output data from the B port. xLEAB
controls the latch function. When xLEAB is low, the latches are transparent.
A subsequent low-to-high transition of xLEAB signal puts the A latches in
the storage mode. xOEAB performs output enable function on the B port.
Data flow from the B port to the A port is similar but requires using xCEBA,
xLEBA, and xOEBA inputs. Flow-through organization of signal pins
simplifies layout. All inputs are designed with hysteresis for improved noise
margin.
The FCT16543T is ideally suited for driving high-capacitance loads
and low-impedance backplanes. The output buffers are designed with
power off disable capability to allow "live insertion" of boards when used
as backplane drivers.
C
D
1B1
1
LEAB
1CEAB
1OEAB
1LEBA
1CEBA
1OEBA
TO SEVEN OTHER CHANNELS
1A1
2B1
2
LEAB
2CEAB
2OEAB
2LEBA
2CEBA
2OEBA
TO SEVEN OTHER CHANNELS
2A1
C
D
C
D
C
D
56
54
55
1
3
2
5
29
31
30
28
26
27
15
52
42
2
INDUSTRIAL TEMPERATURE RANGE
IDT74FCT16543AT/CT/ET
FAST CMOS 16-BIT LATCHED TRANSCEIVER
PIN CONFIGURATION
Symbol Description Max Unit
VTERM
(2)
Terminal Voltage with Respect to GND –0.5 to 7 V
VTERM
(3)
Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V
TSTG Storage Temperature –65 to +150 ° C
I
OUT DC Output Current –60 to +120 mA
ABSOLUTE MAXIMUM RATINGS
(1)
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. All device terminals except FCT162XXX Output and I/O terminals.
3. Outputs and I/O terminals for FCT162XXX.
Symbol Parameter
(1)
Conditions Typ. Max. Unit
CIN Input Capacitance VIN = 0V 3.5 6 pF
C
OUT Output Capacitance VOUT = 0V 3.5 8 pF
CAPACITANCE (TA = +25°C, f = 1.0MHz)
NOTE:
1. This parameter is measured at characterization but not tested.
SSOP/ TSSOP/ TVSOP
TOP VIEW
1
B
1
1
B
2
GND
1
B
3
1
B
4
V
CC
1
B
5
1
B
6
1
OEBA
1
B
7
1
B
8
2
B
1
2
B
2
GND
2
B
3
2
B
4
V
CC
2
B
5
GND
2
B
7
2
B
6
2
B
8
GND
2
OEBA
GND
1
A
1
1
A
2
V
CC
1
A
3
1
A
4
GND
1
A
5
1
A
6
1
A
7
1
A
8
GND
2
A
1
2
A
2
V
CC
2
A
3
2
A
5
2
A
4
2
A
7
GND
2
A
8
2
A
6
2
OEAB
2
LEAB
2
CEAB
1
CEAB
1
LEAB
1
OEAB
1
LEBA
1
CEBA
2
LEBA
2
CEBA
47
37
38
39
40
41
42
43
44
45
46
33
34
35
36
56
55
49
50
51
52
53
54
48
1
2
3
4
5
6
7
8
9
10
12
13
14
15
16
17
18
19
20
11
21
22
23
24
29
30
31
3225
26
27
28
NOTES:
1. * Before xLEAB LOW-to-HIGH Transition
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
2. A-to-B data flow shown; B-to-A flow control is the same, except using xCEBA, xLEBA
and xOEBA.
FUNCTION TABLE
(1, 2)
For A-to-B (Symmetric with B-to-A)
Latch Output
Inputs Status Buffers
xCEAB xLEAB xOEAB xAx to xBx xBx
H X X Storing Z
X H X Storing X
L L L Transparent Current A Inputs
L H L Storing Previous* A Inputs
L L H Transparent Z
L H H Storing Z
PIN DESCRIPTION
Pin Names Description
xOEAB A-to-B Output Enable Input (Active LOW)
xOEBA B-to-A Output Enable Input (Active LOW)
xCEAB A-to-B Enable Input (Active LOW)
xCEBA B-to-A Enable Input (Active LOW)
xLEAB A-to-B Latch Enable Input (Active LOW)
xLEBA B-to-A Latch Enable Input (Active LOW)
x A x A-to-B Data Inputs or B-to-A 3-State Outputs
x B x B-to-A Data Inputs or A-to-B 3-State Outputs
3
IDT74FCT16543AT/CT/ET
FAST CMOS 16-BIT LATCHED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
Symbol Parameter Test Conditions
(1)
Min. Typ.
(2)
Max. Unit
IO Output Drive Current VCC = Max., VO = 2.5V
(3)
–50 –180 mA
VOH Output HIGH Voltage VCC = Min. IOH = –3mA 2.5 3.5 V
VIN = VIH or VIL IOH = –15mA 2.4 3.5 V
IOH = –32mA
(4)
23V
V
OL Output LOW Voltage VCC = Min. IOL = 64mA 0.2 0.55 V
VIN = VIH or VIL
IOFF Input/Output Power Off Leakage
(5)
VCC = 0V, VIN = or VO 4.5V ±1 μA
Symbol Parameter Test Conditions
(1)
Min. Typ.
(2)
Max. Unit
VIH Input HIGH Level Guaranteed Logic HIGH Level 2 V
VIL Input LOW Level Guaranteed Logic LOW Level 0.8 V
IIH Input HIGH Current (Input pins)
(5)
VCC = Max. VI = VCC ——±1µA
Input HIGH Current (I/O pins)
(5)
——±1
IIL Input LOW Current (Input pins)
(5)
VI = GND ±1
Input LOW Current (I/O pins)
(5)
——±1
IOZH High Impedance Output Current VCC = Max. VO = 2.7V ±1 µA
IOZL (3-State Output pins)
(5)
VO = 0.5V ±1
VIK Clamp Diode Voltage VCC = Min., IIN = –18mA –0.7 –1.2 V
IOS Short Circuit Current VCC = Max., VO = GND
(3)
–80 –140 –250 mA
VH Input Hysteresis 100 mV
ICCL Quiescent Power Supply Current VCC = Max 5 500 µ A
I
CCH VIN = GND or VCC
ICCZ
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±10%
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. Duration of the condition can not exceed one second.
5. This test limit for this parameter is ±5µA at TA = –55°C.
OUTPUT DRIVE CHARACTERISTICS

74FCT16543CTPVG

Mfr. #:
Manufacturer:
IDT
Description:
Bus Transceivers 16-Bit Latched Transceiver
Lifecycle:
New from this manufacturer.
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