74FCT16543CTPAG

4
INDUSTRIAL TEMPERATURE RANGE
IDT74FCT16543AT/CT/ET
FAST CMOS 16-BIT LATCHED TRANSCEIVER
POWER SUPPLY CHARACTERISTICS
Symbol Parameter Test Conditions
(1)
Min. Typ.
(2)
Max. Unit
ΔI
CC Quiescent Power Supply VCC = Max. 0.5 1.5 mA
Current TTL Inputs HIGH V
IN = 3.4V
(3)
ICCD Dynamic Power Supply Current
(4)
VCC = Max., Outputs Open VIN = VCC 60 100 µA /
xCEAB and xOEAB = GND V
IN = GND MHz
xCEBA = V
CC
One Input Toggling
50% Duty Cycle
I
C Total Power Supply Current
(6)
VCC = Max., Outputs Open VIN = VCC 0.6 1.5 mA
f
i = 10MHz VIN = GND
50% Duty Cycle
xLEAB, xCEAB and
xOEAB = GND V
IN = 3.4V 0.9 2.3
xCEBA = VCC VIN = GND
One Bit Toggling
VCC = Max., Outputs Open VIN = VCC 2.4 4.5
(5)
fi = 2.5MHz VIN = GND
50% Duty Cycle
xLEAB, xCEAB and
xOEAB = GND V
IN = 3.4V 6.4 16.5
(5)
xCEBA = VCC VIN = GND
Sixteen Bits Toggling
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ΔICC DHNT + ICCD (fCPNCP/2 + fiNi)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
ΔICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
NCP = Number of Clock Inputs at fCP
fi = Input Frequency
Ni = Number of Inputs at fi
5
IDT74FCT16543AT/CT/ET
FAST CMOS 16-BIT LATCHED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
4. This limit is guaranteed but not tested.
74FCT16543AT 74FCT16543CT 74FCT16543ET
Symbol Parameter Condition
(2)
Min.
(2)
Max. Min.
(2)
Max. Min.
(2)
Max. Unit
t
PLH Propagation Delay CL = 50pF 1.5 6.5 1.5 5.1 1.5 3.4 ns
t
PHL Transparent Mode RL = 500Ω
xAx to xBx or xBx to xAx
tPLH Propagation Delay 1.5 8 1.5 5.6 1.5 3.7 ns
tPHL xLEBA to xAx, xLEAB to xBx
t
PHZ Output Enable Time 1.5 9 1.5 7.8 1.5 4.8 ns
t
PLZ xOEBA or xOEAB to xAx or xBx
xCEBA or xCEAB to xAx or xBx
t
PZH Output Disable Time 1.5 7.5 1.5 6.5 1.5 4 ns
tPZL xOEBA or xOEAB to xAx or xBx
xCEBA or xCEAB to xAx or xBx
t
SU Set-up Time HIGH or LOW 2 2 1 ns
xAx or xBx to xLEAB or xLEBA
tH Hold Time HIGH or LOW 2 2 1 ns
xAx or xBx to xLEAB or xLEBA
tW xLEAB or xLEBA Pulse Width LOW 4 4 3
(4)
—ns
tSK(o) Output Skew
(3)
0.5 0.5 0.5 ns
6
INDUSTRIAL TEMPERATURE RANGE
IDT74FCT16543AT/CT/ET
FAST CMOS 16-BIT LATCHED TRANSCEIVER
Pulse
Generator
R
T
D.U.T.
V
CC
V
IN
C
L
V
OUT
50pF
500Ω
500Ω
7.0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
t
SU
t
H
t
REM
t
SU
t
H
PRESET
CLEAR
CLOCK ENABLE
ETC.
HIGH-LOW-HIGH
PULSE
LOW-HIGH-LOW
PULSE
t
W
1.5V
1.5V
SAME PHASE
INPUT TRANSITION
3V
1.5V
0V
1.5V
V
OH
t
PLH
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
3V
1.5V
0V
t
PLH
t
PHL
t
PHL
V
OL
CONTROL
INPUT
3V
1.5V
0V
3.5V
0V
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
SWITCH
CLOSED
SWITCH
OPEN
V
OL
0.3V
0.3V
t
PLZ
t
PZL
t
PZH
t
PHZ
3.5V
0V
1.5V
1.5V
ENABLE DISABLE
V
OH
TEST CIRCUITS AND WAVEFORMS
Propagation Delay
Test Circuits for All Outputs
Enable and Disable Times
Set-up, Hold, and Release Times
Pulse Width
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns.
Test Switch
Open Drain
Disable Low Closed
Enable Low
All Other Tests Open
SWITCH POSITION
DEFINITIONS:
C
L = Load capacitance: includes jig and probe capacitance.
R
T = Termination resistance: should be equal to ZOUT of the Pulse Generator.

74FCT16543CTPAG

Mfr. #:
Manufacturer:
Description:
Bus Transceivers 16-Bit Latched Transceive
Lifecycle:
New from this manufacturer.
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