NX3V1G384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 4 November 2011 10 of 18
NXP Semiconductors
NX3V1G384
Low-ohmic single-pole single-throw analog switch
12.2 Additional dynamic characteristics
[1] f
i
is biased at 0.5V
CC
.
12.3 Test circuits
Table 12. Additional dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); V
I
= GND or V
CC
(unless otherwise
specified); t
r
= t
f
2.5 ns.
Symbol Parameter Conditions T
amb
= 25 C Unit
Min Typ Max
THD total harmonic
distortion
f
i
=20Hzto20 kHz; R
L
=32; see Figure 17
[1]
V
CC
=1.4V; V
I
= 1 V (p-p) - 0.05 - %
V
CC
=1.65V; V
I
= 1.2 V (p-p) - 0.03 - %
V
CC
=2.3V; V
I
= 1.5 V (p-p) - 0.01 - %
V
CC
=2.7V; V
I
= 2 V (p-p) - 0.01 - %
V
CC
=4.3V; V
I
= 2 V (p-p) - 0.01 - %
f
(3dB)
3 dB frequency
response
R
L
=50; see Figure 18
[1]
V
CC
= 1.4 V to 4.3 V - 25 - MHz
iso
isolation (OFF-state) f
i
= 100 kHz; R
L
=50; see Figure 19
[1]
V
CC
= 1.4 V to 4.3 V - 90 - dB
V
ct
crosstalk voltage between digital inputs and switch;
f
i
= 1 MHz; C
L
= 50 pF; R
L
=50; see Figure 20
V
CC
= 1.4 V to 3.6 V - 0.3 - V
V
CC
= 3.6 V to 4.3 V - 0.5 - V
Q
inj
charge injection f
i
= 1 MHz; C
L
= 0.1 nF; R
L
=1 M; V
gen
=0V;
R
gen
=0; see Figure 21
V
CC
= 1.5 V - 6.5 - pC
V
CC
= 1.8 V - 6.5 - pC
V
CC
= 2.5 V - 6.5 - pC
V
CC
= 3.3 V - 6.5 - pC
V
CC
=4.3V - 12 - pC
Fig 17. Test circuit for measuring total harmonic distortion
D
001aai602
Y/Z
E
V
IL
f
i
R
L
Z/Y
V
CC
0.5V
CC
NX3V1G384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 4 November 2011 11 of 18
NXP Semiconductors
NX3V1G384
Low-ohmic single-pole single-throw analog switch
Adjust f
i
voltage to obtain 0 dBm level at output. Increase f
i
frequency until dB meter reads 3dB.
Fig 18. Test circuit for measuring the frequency response when channel is in ON-state
dB
001aai603
Y/Z
E
V
IL
f
i
R
L
Z/Y
V
CC
0.5V
CC
Adjust f
i
voltage to obtain 0 dBm level at input.
Fig 19. Test circuit for measuring isolation (OFF-state)
dB
001aai604
Y/Z
E
V
IH
f
i
R
L
Z/Y
V
CC
0.5V
CC
R
L
0.5V
CC
a. Test circuit
b. input and output pulse definitions
Fig 20. Test circuit for measuring crosstalk voltage between digital inputs and switch
VV
O
001aai605
R
L
C
L
R
L
V
I
Y/Z Z/Y
E
V
CC
0.5V
CC
0.5V
CC
G
001aai606
on offoff
logic
input (E)
V
O
V
ct
NX3V1G384 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 6 — 4 November 2011 12 of 18
NXP Semiconductors
NX3V1G384
Low-ohmic single-pole single-throw analog switch
a. Test circuit.
b. Input and output pulse definitions.
Definition: Q
inj
= V
O
C
L
.
V
O
= output voltage variation.
R
gen
= generator resistance.
V
gen
= generator voltage.
Fig 21. Test circuit for measuring charge injection
VV
O
001aai607
C
L
R
L
R
gen
Y/Z Z/Y
E
V
CC
GND
V
gen
G
V
I
001aai608
V
O
offonoff
V
O
logic
input (E)

NX3V1G384GM,115

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Analog Switch ICs 1SW SPST 4.3V 25MHz
Lifecycle:
New from this manufacturer.
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