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74AC377SCX

P1-P3P4-P6P7-P9P10-P12P13-P13
©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com
74AC377, 74ACT377 Rev. 1.6.1 7
74AC377, 74ACT377 — Octal D-Type Flip-Flop with Clock Enable
AC Electrical Characteristics for AC
Note:
6. Voltage range 3.3 is 3.3V ± 0.3V. Voltage range 5.0 is 5.0V ± 0.5V
AC Operating Requirements for AC
Note:
7. Voltage range 3.3 is 3.0V ± 0.3V. Voltage range 5.0 is 5.0V ± 0.5V
Symbol Parameter V
CC
(V)
(6)
T
A
= +25°C T
A
= –40°C to +85°C
UnitsMin. Typ. Max. Min. Max.
f
MAX
Maximum Clock
Frequency
3.3 90 125 75 MHz
5.0 140 175 125
t
PLH
Propagation Delay,
CP to Q
n
3.3 3.0 8.0 13.0 1.5 14.0 ns
5.0 2.0 6.0 9.0 1.5 10.0
t
PHL
Propagation Delay,
CP to Q
n
3.3 3.5 8.5 13.0 2.0 14.5 ns
5.0 2.5 6.5 10.0 1.5 11.0
Symbol Parameter V
CC
(V)
(7)
T
A
= +25°C,
C
L
= 50pF
T
A
= –40°C to +85°C,
C
L
= 50pF
UnitsTyp. Guaranteed Minimum
t
S
Setup Time, HIGH or LOW,
D
n
to CP
3.3 3.5 5.5 6.0 ns
5.0 2.5 4.0 4.5
t
H
Hold Time, HIGH or LOW,
D
n
to CP
3.3 –2.0 0 0 ns
5.0 –1.0 1.0 1.0
t
S
Setup Time, HIGH or LOW,
CE
to CP
3.3 4.0 6.0 7.5 ns
5.0 2.5 4.0 4.5
t
H
Hold Time, HIGH or LOW,
CE
to CP
3.3 –3.5 0 0 ns
5.0 –2.0 1.0 1.0
t
W
CP Pulse Width,
HIGH or LOW
3.3 3.5 5.5 6.0 ns
5.0 2.5 4.0 4.5
©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com
74AC377, 74ACT377 Rev. 1.6.1 8
74AC377, 74ACT377 — Octal D-Type Flip-Flop with Clock Enable
AC Electrical Characteristics for ACT
Note:
8. Voltage Range 5.0 is 5.0V ± 0.5V
AC Operating Requirements for ACT
Note:
9. Voltage Range 5.0 is 5.0V ± 0.5V
Capacitance
Symbol Parameter V
CC
(V)
(8)
T
A
= +25°C,
C
L
= 50pF
T
A
= –40°C to +85°C,
C
L
= 50pF
UnitsMin. Typ. Max. Min. Max.
f
MAX
Maximum Clock
Frequency
5.0 140 175 125 MHz
t
PLH
Propagation Delay,
CP to Q
n
5.0 3.0 6.5 9.0 2.5 10.0 ns
t
PHL
Propagation Delay,
CP to Q
n
5.0 3.5 7.0 10.0 2.5 11.0 ns
Symbol Parameter V
CC
(V)
(9)
T
A
= +25°C,
C
L
= 50pF
T
A
= –40°C to +85°C,
C
L
= 50pF
UnitsTyp. Guaranteed Minimum
t
S
Setup Time, HIGH or LOW,
D
n
to CP
5.0 2.5 4.5 5.5 ns
t
H
Hold Time, HIGH or LOW,
D
n
to CP
5.0 –1.0 1.0 1.0 ns
t
S
Setup Time, HIGH or LOW,
CE
to CP
5.0 2.5 4.5 5.5 ns
t
H
Hold Time, HIGH or LOW,
CE
to CP
5.0 –1.0 1.0 1.0 ns
t
W
CP Pulse Width,
HIGH or LOW
5.0 2.0 4.0 4.5 ns
Symbol Parameter Conditions Typ. Units
C
IN
Input Capacitance V
CC
= OPEN 4.5 pF
C
PD
Power Dissipation Capacitance V
CC
= 5.0V 90.0 pF
©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com
74AC377, 74ACT377 Rev. 1.6.1 9
74AC377, 74ACT377 — Octal D-Type Flip-Flop with Clock Enable
Physical Dimensions
Figure 1. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www
.fairchildsemi.com/packaging/
0.10 C
C
A
SEE DETAIL A
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE CONFORMS TO JEDEC
MS-013, VARIATION AC, ISSUE E
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
E) LANDPATTERN STANDARD: SOIC127P1030X265-20L
PIN ONE
INDICATOR
0.25
1 10
BC A
M
20 11
B
X45°
8°
0°
SEATING PLANE
GAGE PLANE
DETAIL A
SCALE: 2:1
SEATING PLANE
LAND PATTERN RECOMMENDATION
F) DRAWING FILENAME: MKT-M20BREV3
0.65
1.27
2.25
9.50
13.00
12.60
11.43
7.60
7.40
10.65
10.00
0.51
0.35
1.27
2.65 MAX
0.30
0.10
0.33
0.20
0.75
0.25
(R0.10)
(R0.10)
1.27
0.40
(1.40)
0.25
D) CONFORMS TO ASME Y14.5M-1994
P1-P3P4-P6P7-P9P10-P12P13-P13

74AC377SCX

Mfr. #:
Buy 74AC377SCX
Manufacturer:
ON Semiconductor
Description:
IC FF D-TYPE SNGL 8BIT 20SOIC
Lifecycle:
New from this manufacturer.
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