FDS4885C Datasheet FDS4885C | P1-P3

January 2005

2005 Fairchild Semiconductor Corporation

FDS4885C Rev D(W)

FDS4885C

Dual N & P-Channel PowerTrench



MOSFET

General Description

These dual N- and P-Channel enhancement mode

power field effect transistors are produced using

Fairchild Semiconductor’s advanced PowerTrench

process that has been especially tailored to minimize

on-state resistance and yet maintain superior switching

performance.

These devices are well suited for low voltage and

battery powered applications where low in-line power

loss and fast switching are required.

Applications

• Synchronous rectifier

• Backlight inverter stage

Features

• Q1: N-Channel

7.5A, 40V R

DS(on)

= 22mΩ @ V

GS

= 10V

R

DS(on)

= 35mΩ @ V

GS

= 7V

• Q2: P-Channel

–6A, –40V R

DS(on)

= 31mΩ @ V

GS

= –10V

R

DS(on)

= 42mΩ @ V

GS

= –4.5V

• Fast switching speed

• High power and handling capability in a widely

used surface mount package

S

D

S

SO-8

D

G

D1

D2

S1

G1

S2

G2

Pin 1

SO-8

4

3

2

1

5

6

7

8

Q1

Q2

Absolute Maximum Ratings T

A

= 25°C unless otherwise noted

Symbol Parameter Q1 Q2 Units

V

DSS

Drain-Source Voltage 40 40 V

V

GSS

Gate-Source Voltage

±20 ±20

V

I

D

Drain Current - Continuous (Note 1a) 7.5 –6 A

- Pulsed 20 –20

P

D

Power Dissipation for Dual Operation 2 W

Power Dissipation for Single Operation (Note 1a) 1.6

(Note 1b)

1

(Note 1c)

0.9

T

J

, T

STG

Operating and Storage Junction Temperature Range –55 to +150

°C

Thermal Characteristics

R

θJA

Thermal Resistance, Junction-to-Ambient (Note 1a) 78

°C/W

R

θJC

Thermal Resistance, Junction-to-Case (Note 1) 40

Package Marking and Ordering Information

Device Marking Device Reel Size Tape width Quantity

FDS4885C FDS4885C 13” 12mm 2500 units

FDS4885C

FDS4885C Rev D(W)

Electrical Characteristics T

A

= 25°C unless otherwise noted

Symbol Parameter Test Conditions Type Min Typ Max Units

Off Characteristics

BV

DSS

Drain-Source Breakdown

Voltage

V

GS

= 0 V, I

D

= 250 µA

V

GS

= 0 V, I

D

= –250 µA

Q1

Q2

40

–40

V

∆BVDSS

∆T

J

Breakdown Voltage

Temperature Coefficient

I

D

= 250 µA, Referenced to 25°C

I

D

= –250 µA, Referenced to 25°C

Q1

Q2

40

–30

mV/°C

I

DSS

Zero Gate Voltage Drain

Current

V

DS

= 32 V, V

GS

= 0 V

V

DS

= –32 V, V

GS

= 0 V

Q1

Q2

1

–1

µA

I

GSSF

Gate-Body Leakage, Forward V

GS

= 20 V, V

DS

= 0 V All 100 nA

I

GSSR

Gate-Body Leakage, Reverse V

GS

= –20 V, V

DS

= 0 V All –100 nA

On Characteristics (Note 2)

V

GS(th)

Gate Threshold Voltage

V

DS

= V

GS

, I

D

= 250 µA

V

DS

= V

GS

, I

D

= –250 µA

Q1

Q2

2

–1

4

–1.6

5

–3

V

∆VGS(th)

∆T

J

Gate Threshold Voltage

Temperature Coefficient

I

D

= 250 µA, Referenced to 25°C

I

D

= –250 µA, Referenced to 25°C

Q1

Q2

–9

5

mV/°C

V

GS

= 10 V, I

D

= 7.5 A

V

GS

= 7 V, I

D

= 6.5 A

V

GS

= 10 V, I

D

= 7.5 A, T

J

= 125°C

Q1 17

27

26

22

35

36

mΩ

R

DS(on)

Static Drain-Source

On-Resistance

V

GS

= –10 V, I

D

= –6 A

V

GS

= –4.5 V, I

D

= –5.3 A

V

GS

= –10 V, I

D

= –6 A, T

J

= 125°C

Q2 26

34

37

31

42

47

g

FS

Forward Transconductance V

DS

= 10 V, I

D

= 7.5 A

V

DS

= –10 V, I

D

=–6 A

Q1

Q2

14

19

S

Dynamic Characteristics

C

iss

Input Capacitance Q1

Q2

900

1560

pF

C

oss

Output Capacitance Q1

Q2

200

215

pF

C

rss

Reverse Transfer Capacitance

Q1

V

DS

= 20 V, V

GS

= 0 V, f = 1.0 MHz

Q2

V

DS

= –20 V, V

GS

= 0 V, f = 1.0 MHz

Q1

Q2

100

110

pF

R

G

Gate Resistance V

GS

= 15 mV, f = 1.0 MHz Q1

Q2

2

9

Ω

FDS4885C

FDS4885C Rev D(W)

Electrical Characteristics (continued) T

A

= 25°C unless otherwise noted

Symbol Parameter Test Conditions Type Min Typ Max Units

Switching Characteristics (Note 2)

t

d(on)

Turn-On Delay Time Q1

Q2

26

11

42

20

ns

t

r

Turn-On Rise Time Q1

Q2

36

14

58

25

ns

t

d(off)

Turn-Off Delay Time Q1

Q2

45

71

72

114

ns

t

f

Turn-Off Fall Time

Q1

V

DD

= 20 V, I

D

= 1 A,

V

GS

= 10V, R

GEN

= 6 Ω

Q2

V

DD

= –20 V, I

D

= –1 A,

V

GS

= –10V, R

GEN

= 6 Ω

Q1

Q2

33

30

53

48

ns

Q

g

Total Gate Charge Q1

Q2

15

29

21

41

nC

Q

gs

Gate-Source Charge Q1

Q2

5

4

nC

Q

gd

Gate-Drain Charge

Q1

V

DS

= 20 V, I

D

= 7.5 A, V

GS

= 10 V

Q2

V

DS

= –20 V, I

D

= –6 A,V

GS

= –10 V

Q1

Q2

4.6

5

nC

Drain–Source Diode Characteristics and Maximum Ratings

I

S

Maximum Continuous Drain-Source Diode Forward Current Q1

Q2

1.3

–1.3

A

V

SD

Drain-Source Diode Forward

Voltage

V

GS

= 0 V, I

S

= 1.3 A (Note 2)

V

GS

= 0 V, I

S

= –1.3 A (Note 2)

Q1

Q2

0.7

–0.7

1.2

–1.2

V

t

rr

Diode Reverse Recovery

Time

Q1

Q2

26

nS

Q

rr

Diode Reverse Recovery

Charge

Q1

I

F

= 7.5 A, d

iF

/d

t

= 100 A/µs

Q2

I

F

= –6 A, d

iF

/d

t

= 100 A/µs

Q1

Q2

18

13

nC

Notes:

1. R

θJA

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of

the drain pins. R

θJC

is guaranteed by design while R

θCA

is determined by the user's board design.

a) 78°/W when

mounted on a

0.5 in

2

pad of 2 oz

copper

b) 125°/W when

mounted on a .02 in

2

pad of 2 oz copper

c) 135°/W when mounted on a

minimum pad.

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%

FDS4885C

FDS4885C

FDS4885C

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